公开(公告)号：US06300575B1

公开(公告)日：2001-10-09

申请号：US08918084

申请日：1997-08-25

Applicant: Bernd K. Appelt ,  Saswati Datta ,  Michael A. Gaynes ,  John M. Lauffer ,  James R. Wilcox

Inventor： Bernd K. Appelt ,  Saswati Datta ,  Michael A. Gaynes ,  John M. Lauffer ,  James R. Wilcox

IPC: H05K114

CPC classification number: H05K3/325 ,  H05K3/4614 ,  H05K2201/0373 ,  H05K2201/09536 ,  H05K2201/10666 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49165 ,  Y10T29/49194

Abstract: A method is provided for connecting two conductive layers in an electronic circuit package comprising the steps of forming dendrites on selected regions of a first conductive layer, forming dendrites on selected regions of a second conductive layer, applying an epoxy adhesive material over the first conductive layer, and compressively attaching the second conductive layer to the first conductive layer such that the dendrites on the first conductive layer contact the dendrites on the second conductive layer. Also claimed is an electronic circuit package incorporating the dendrites used for electrical interconnection manufactured in accordance with the present invention. An alternative embodiment of the invention utilizes an intermediate surface metal with dendrites in place of a “through via.”

Abstract translation: 提供了一种用于连接电子电路封装中的两个导电层的方法，包括以下步骤：在第一导电层的选定区域上形成枝晶，在第二导电层的选定区域上形成枝晶，在第一导电层上施加环氧粘合剂材料 并且将第二导电层压缩附接到第一导电层，使得第一导电层上的枝晶与第二导电层上的枝晶接触。 还要求保护的是包括用于根据本发明制造的电互连的树突的电子电路封装。 本发明的替代实施例利用具有树突的中间表面金属代替“通孔”。

公开(公告)号：US20010001593A1

公开(公告)日：2001-05-24

申请号：US09764467

申请日：2001-01-17

Inventor： Gregg J. Armezzani ,  Matthew A. Heller

IPC: H05K001/14

CPC classification number: H01L23/4985 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2924/0002 ,  H05K3/363 ,  H05K2201/096 ,  H05K2201/10666 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/0455 ,  H01L2924/00

Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.

Abstract translation: 一种电子封装，其包括通过焊料固定在一起的第一和第二电路化基板，该焊接部件包括用于附接到印刷电路板的第一接触部分和用于将两个基板接合在一起的第二接触部分（例如，以形成多芯片 模块）。 半导体芯片可以定位在所形成的焊料部件上并电耦合到所形成的焊接部件上。

公开(公告)号：US6093477A

公开(公告)日：2000-07-25

申请号：US143550

申请日：1998-08-31

Applicant: Hideto Matsufusa ,  Ryuichi Hagiya

Inventor： Hideto Matsufusa ,  Ryuichi Hagiya

IPC: G06F3/041 ,  G06F3/033 ,  G06F3/044 ,  H05K1/00 ,  H05K1/11 ,  H05K1/14 ,  H05K3/28 ,  H05K3/30 ,  H05K3/32 ,  H05K3/36 ,  H05K3/40 ,  H05K3/46 ,  B32B3/10 ,  G08C21/00 ,  G09G5/00

CPC classification number: G06F3/044 ,  H05K3/363 ,  H05K1/0289 ,  H05K1/116 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/10666 ,  H05K2201/10977 ,  H05K2203/0455 ,  H05K2203/1178 ,  H05K3/281 ,  H05K3/305 ,  H05K3/321 ,  H05K3/361 ,  H05K3/4069 ,  H05K3/4611 ,  Y10S428/901 ,  Y10T428/24273 ,  Y10T428/24322 ,  Y10T428/24917

Abstract: A resist film and a bonding layer are disposed between a sensor substrate and a PCB, and a cutout is formed in the resist film and the bonding layer at the part where the through hole of the sensor substrate communicates with the through hole of a PCB to form an air vent communicating with the outside of the edge part of the laminated substrates. When the conductive material is filled in the through hole from the obverse surface of the sensor substrate, the air in the through hole is released from the air vent to thereby reliably fill the conductive material in the through hole, which can reliably bring the electrode and the land 28 into conduction.

Abstract translation: 在传感器基板和PCB之间设置抗蚀剂膜和接合层，并且在抗蚀剂膜和传感器基板的通孔与PCB的通孔连通的部分处的接合层形成切口， 形成与层叠基板的边缘部的外侧连通的排气口。 当导电材料从传感器基板的正面填充在通孔中时，通孔中的空气从通风口释放，从而可靠地填充通孔中的导电材料，这可以使电极和 土地28进入。

公开(公告)号：US6038135A

公开(公告)日：2000-03-14

申请号：US591119

申请日：1996-01-25

Applicant: Yutaka Higashiguchi ,  Mitsuo Inagaki ,  Makoto Totani ,  Yasuhiro Teshima

Inventor： Yutaka Higashiguchi ,  Mitsuo Inagaki ,  Makoto Totani ,  Yasuhiro Teshima

IPC: H01L23/32 ,  H01L23/538 ,  H05K1/11 ,  H05K1/14 ,  H05K3/22 ,  H05K3/34 ,  H05K3/36 ,  H05K1/18

CPC classification number: H05K1/112 ,  H05K1/141 ,  H05K3/225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H05K2201/049 ,  H05K2201/10287 ,  H05K2201/10666 ,  H05K2201/10734 ,  H05K2203/0455 ,  H05K3/3405 ,  H05K3/3431 ,  H05K3/3436 ,  H05K3/368

Abstract: A wiring board to be provided between a packaged electronic component having an integrated circuit and a mother board on which the packaged electronic component should be mounted, includes a base made of an insulating material, a first circuit pattern which is provided on a first surface of the base and has terminals connectable to terminals of the packaged electronic component for external connections, and a second circuit pattern which is provided on a second surface of the base opposite to the first surface thereof and has terminals connectable to terminals provided on the mother board.

Abstract translation: 在具有集成电路的封装的电子部件和其上安装有封装的电子部件的母板之间提供的布线板包括由绝缘材料制成的基座，第一电路图案设置在第一表面上 底座并具有可连接到用于外部连接的封装电子部件的端子的端子，以及设置在与其第一表面相对的基座的第二表面上并且具有可连接到设置在母板上的端子的端子的第二电路图案。

公开(公告)号：US5962922A

公开(公告)日：1999-10-05

申请号：US40472

申请日：1998-03-18

Applicant: Bily Wang

Inventor： Bily Wang

IPC: H01L23/13 ,  H01L23/498 ,  H05K1/11 ,  H05K3/34 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H05K3/3436 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H05K1/116 ,  H05K2201/09463 ,  H05K2201/09472 ,  H05K2201/0949 ,  H05K2201/09509 ,  H05K2201/09845 ,  H05K2201/10666 ,  H05K2203/1178 ,  Y02P70/613

Abstract: A flat package for integrated circuit chip has a substrate with plated through holes. The top flange of a plated through hole is interconnected to a terminal of the IC chip. The bottom flange of the through hole has a cavity recessed into the substrates. A solder is placed between a circuit contact on a mother board and the bottom flange. Upon heating, the solder rises to fill the cavity, to make connection between the terminal on the IC chip and the contact on the mother board.

Abstract translation: 用于集成电路芯片的扁平封装具有带有电镀通孔的基板。 电镀通孔的顶部凸缘与IC芯片的端子互连。 通孔的底部凸缘具有凹入基板的腔体。 焊料放置在母板上的电路触点和底部法兰之间。 在加热时，焊料上升以填充空腔，以使IC芯片上的端子和母板上的触点之间的连接。

公开(公告)号：US5938104A

公开(公告)日：1999-08-17

申请号：US173155

申请日：1998-10-14

Applicant: John R. Saxelby, Jr. ,  Brant T. Johnson

Inventor： John R. Saxelby, Jr. ,  Brant T. Johnson

IPC: H01L21/48 ,  H01L23/498 ,  H01L23/538 ,  H05K1/03 ,  H05K1/11 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40 ,  B23K31/00

CPC classification number: H01L21/4839 ,  H01L23/49827 ,  H01L23/5385 ,  H05K3/3442 ,  H05K3/4092 ,  H01L2224/05553 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48799 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/14 ,  H05K1/0306 ,  H05K1/111 ,  H05K2201/0397 ,  H05K2201/10666 ,  H05K3/368 ,  Y02P70/613 ,  Y10T29/49155 ,  Y10T428/12535 ,  Y10T428/12576 ,  Y10T428/12611

Abstract: A method for use with a direct metal bonding type process in which a metal layer is bonded to an insulating layer. The metal layer is applied to the insulating layer to enable a direct metal bond to be formed between the layers. The integrity of the bond between a portion of the layers is reduced by providing, prior to bonding, an interrupter between the portion of the layers. A structure in which a metal layer is directly metal bonded to an insulating layer and includes an interrupter between a portion of the metal layer and a portion of the insulating layer. The interrupter reduces the integrity of the bond between the portion of the metal layer and the portion of the insulating layer. The structure includes other features similar to those set forth with respect to the above described method.

公开(公告)号：US5924873A

公开(公告)日：1999-07-20

申请号：US857122

申请日：1997-05-15

Applicant: Tina Barcley ,  Robert A. Isola ,  Edward T. Pokriefka ,  Norman J. Roth ,  Vasil Germanski

Inventor： Tina Barcley ,  Robert A. Isola ,  Edward T. Pokriefka ,  Norman J. Roth ,  Vasil Germanski

IPC: H01R12/62 ,  H05K1/02 ,  H05K1/11 ,  H05K3/28 ,  H05K3/36 ,  H05K9/00 ,  H02R9/09

CPC classification number: H05K9/0039 ,  H05K1/0224 ,  H05K1/118 ,  H05K3/363 ,  H05K1/0253 ,  H05K2201/0715 ,  H05K2201/09481 ,  H05K2201/09681 ,  H05K2201/09709 ,  H05K2201/10666 ,  H05K2203/0195 ,  H05K3/281

Abstract: A flexible circuit board interconnect is provided with flex strain relief capabilities. The flexible circuit board interconnect includes a polyamide or polyimide (both are nylons) substrate layer, a ground plane layer and a conductor strip layer. The ground plane layer is provided with scalloped edges along opposite sides thereof. The ground plane provides a shield for preventing radio frequency interference to and from the signals passed through the conductor strips. The ground plane layer and the conductor strips are covered at least partially by a pair of soldermask layers which are provided with scalloped edges. The scalloped edges on the soldermask layers and the ground plane prevent the generation of a crease or fold line on the surface of the flexible circuit board interconnect. Each of the conductor strips are provided with a pair of vias on opposite ends of thereof. The vias are arranged to be offset from the vias on adjacent conductor strips such that a perforation-type tear line is avoided and such that when a hot bar soldering is used, at least one via remains uncovered for receiving soldering wicking, thus reducing the likelihood of solder bridging across conductor strips.

公开(公告)号：US5838064A

公开(公告)日：1998-11-17

申请号：US423455

申请日：1995-04-19

Applicant: Yuzo Shimada ,  Takayuki Suyama ,  Yoshimasa Tanaka

Inventor： Yuzo Shimada ,  Takayuki Suyama ,  Yoshimasa Tanaka

IPC: H01L21/48 ,  H01L23/40 ,  H01L23/495 ,  H01L23/498 ,  H05K1/02 ,  H05K3/30 ,  H05K3/34 ,  H05K3/36 ,  H01L23/10 ,  H01L23/34

CPC classification number: H01L21/486 ,  H01L23/4006 ,  H01L23/49572 ,  H01L23/4985 ,  H01L24/50 ,  H05K3/301 ,  H05K3/363 ,  H01L2023/4043 ,  H01L2023/4056 ,  H01L2023/4062 ,  H01L2023/4087 ,  H01L2224/73253 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H05K1/0201 ,  H05K2201/062 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/10568 ,  H05K2201/10666 ,  H05K2201/10681 ,  H05K3/3457

Abstract: An electronic package includes a supporting member, an electronic device, a carrier, a substrate a cooling means. The supporting member includes a plate and a bottom leg for supporting the plate. A first end of the bottom leg is joined to the lower surface of the plate. The carrier has a hole for receiving the bottom leg. The electronic device is connected to the carrier and is attached to the lower surface of the plate. A second end of the bottom leg is inserted into the hole of the carrier. The second end of the bottom leg is joined to the upper surface of the substrate. The electronic device is positioned between the plate of the supporting member and the substrate. The cooling is attached onto and supported by the upper surface of the plate.

Abstract translation: 电子包装包括支撑部件，电子装置，载体，基板，冷却装置。 支撑构件包括用于支撑板的板和底腿。 底脚的第一端连接到板的下表面。 载体具有用于接收底部支腿的孔。 电子装置连接到载体上并附着到板的下表面。 底脚的第二端插入托架的孔中。 底脚的第二端连接到基底的上表面。 电子设备位于支撑构件的板和基板之间。 冷却被附着到板的上表面并由其支撑。

公开(公告)号：US5814535A

公开(公告)日：1998-09-29

申请号：US573131

申请日：1995-12-15

Applicant: Yuzo Shimada ,  Takayuki Suyama ,  Yoshimasa Tanaka

Inventor： Yuzo Shimada ,  Takayuki Suyama ,  Yoshimasa Tanaka

IPC: H01L21/48 ,  H01L23/40 ,  H01L23/495 ,  H01L23/498 ,  H05K1/02 ,  H05K3/30 ,  H05K3/34 ,  H05K3/36 ,  H01L21/00 ,  H01L21/70 ,  H01L23/34

CPC classification number: H01L21/486 ,  H01L23/4006 ,  H01L23/49572 ,  H01L23/4985 ,  H01L24/50 ,  H05K3/301 ,  H05K3/363 ,  H01L2023/4043 ,  H01L2023/4056 ,  H01L2023/4062 ,  H01L2023/4087 ,  H01L2224/73253 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H05K1/0201 ,  H05K2201/062 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/10568 ,  H05K2201/10666 ,  H05K2201/10681 ,  H05K3/3457

Abstract: An electronic package according to the present invention comprises a supporting member, an electronic device, a carrier, a substrate and cooling means. The supporting member includes a plate and a bottom leg for supporting the plate. A first end of the bottom leg is joined to the lower surface of the plate. The carrier has a hole for receiving the bottom leg. The electronic device is connected to the carrier and is attached to the lower surface of the plate. A second end of the bottom leg is inserted into the hole of the carrier. The second end of the bottom leg is joined to the upper surface of the substrate. The electronic device is positioned between the plate of the supporting member and the substrate. The cooling means is attached onto and supported by the upper surface of the plate.

Abstract translation: 根据本发明的电子封装包括支撑构件，电子装置，载体，基板和冷却装置。 支撑构件包括用于支撑板的板和底腿。 底脚的第一端连接到板的下表面。 载体具有用于接收底部支腿的孔。 电子装置连接到载体上并附着到板的下表面。 底脚的第二端插入托架的孔中。 底脚的第二端连接到基底的上表面。 电子设备位于支撑构件的板和基板之间。 冷却装置附接到板的上表面并由板的上表面支撑。

公开(公告)号：US5760469A

公开(公告)日：1998-06-02

申请号：US602421

申请日：1996-02-16

Applicant: Yutaka Higashiguchi ,  Mitsuo Inagaki ,  Toshio Kumai ,  Ryoichi Ochiai ,  Yasuhiro Teshima ,  Mamoru Niishiro ,  Yasushi Kobayashi ,  Hideaki Tamura ,  Hiroshi Iimura ,  Seishi Chiba ,  Yukio Sekiya ,  Shuzo Igarashi ,  Yasuhiro Ichihara

Inventor： Yutaka Higashiguchi ,  Mitsuo Inagaki ,  Toshio Kumai ,  Ryoichi Ochiai ,  Yasuhiro Teshima ,  Mamoru Niishiro ,  Yasushi Kobayashi ,  Hideaki Tamura ,  Hiroshi Iimura ,  Seishi Chiba ,  Yukio Sekiya ,  Shuzo Igarashi ,  Yasuhiro Ichihara

IPC: H01L23/12 ,  H01L23/057 ,  H01L23/31 ,  H01L23/498 ,  H01L23/50 ,  H05K1/02 ,  H05K3/34 ,  H01L23/02 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H05K3/3436 ,  H01L23/057 ,  H01L23/3107 ,  H01L23/49816 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15153 ,  H01L2924/15159 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H05K1/0271 ,  H05K2201/068 ,  H05K2201/09036 ,  H05K2201/10477 ,  H05K2201/10568 ,  H05K2201/10666 ,  H05K3/3431 ,  Y02P70/613

Abstract: A semiconductor device includes a package having opposing surfaces, a first terminal for an outer connection supported by said package and electronic components supported by said package, and the opposing surfaces of the package having slits so that a shape of the package can be changed in a mounted state. Therefore, stress applied to soldered junctions of the first and second terminals is decreased.

Abstract translation: 半导体器件包括具有相对表面的封装，用于由所述封装支撑的外部连接的第一端子和由所述封装支撑的电子部件，并且封装的相对表面具有狭缝，使得封装的形状可以在 安装状态。 因此，施加到第一端子和第二端子的焊接接头的应力减小。