Abstract:
An electronic component includes an electronic element including outer electrodes on a surface, a substrate terminal on which the electronic element is mounted, and a conductor that covers at least a portion of the substrate terminal. The substrate terminal includes a first main surface, a second main surface at a side opposite to the first main surface, and a side surface connecting the first main surface and the second main surface. The substrate terminal includes a mounting electrode that is provided on the first main surface and is electrically connected to the outer electrodes of the electronic element. The mounting electrode includes adjacent portions that are located to be adjacent to the side surface of the substrate terminal. The conductor covers at least a portion of the adjacent portion.
Abstract:
Devices and methods are disclosed for reducing vibration and noise from capacitor devices. The device includes a circuit board, and first and second capacitor structures. The second capacitor structure has substantially the same properties as the first and is coupled to the opposite face of a supporting structure substantially opposite of the first capacitor structure. The first and second capacitor structures can receive substantially the same excitation signals, can be electrically connected in parallel or in series. The first and second capacitor structures can be discrete capacitors, capacitor layers, stacks or arrays of multiple capacitor devices, or other capacitor structures. Stacks of multiple capacitor devices can be arranged symmetrically about the supporting structure. Arrays of multiple capacitor devices can be arranged with offsetting capacitors on the opposite face of the supporting structure substantially opposite one another.
Abstract:
According to one embodiment, an electronic device includes a printed circuit board on which mounted is a multilayer ceramic capacitor includes a rectangular parallelepiped capacitor main body in which a pair of external electrodes are formed on both ends in a shorter side. The electronic device has a mount structure in which portions of the pair of external electrodes are soldered to the printed circuit board while setting a width of first and second pads provided respectively on the pair of external electrodes less than a width of the pair of external electrodes.
Abstract:
A printed wiring board including a connection part that is connected to a projecting portion of an external member by soldering, the connection part including a first hole in which the projecting portion is inserted, a main land to which the projecting portion is soldered, a metallic pattern that is drawn from the main land, and a sub-land that is connected to the main land through the metallic pattern, wherein the main land is constructed with a metallic film configured to cover a peripheral region of the first hole in at least a front face of the printed wiring board including the front face and a back face, the front face to which the soldering is performed and the back face on a side opposite to the front face, and the metallic film is not formed on a sidewall forming the first hole, and where the sub-land is constructed with a metallic film configured to cover a sidewall formed by a second hole piercing the printed wiring board and a peripheral region of the second hole in both the front face and the back face of the printed wiring board.
Abstract:
A circuit board includes a wiring board on which is mounted first and second laminated ceramic capacitors near or adjacent to each other, arranged along a direction parallel or substantially parallel to a main surface of the wiring board, and electrically connected in series or in parallel via a conductive pattern provided on the wiring board. One width direction side surface of the first laminated ceramic capacitor and one length direction end surface of the second laminated ceramic capacitor oppose each other perpendicularly or approximately perpendicularly.
Abstract:
There is provided a multilayer ceramic capacitor including: a ceramic body; an active layer including a plurality of electrodes formed to be alternately exposed to both end surfaces of the ceramic body; an upper cover layer; a lower cover layer having a thickness greater than that of the upper cover layer; and external electrodes, wherein when a distance from an end portion of the lowermost internal electrode of the active layer to an end portion of the external electrode covering a portion of a lower surface of the ceramic body is E, the shortest distance from the end portion of the external electrode to the lowermost internal electrode of the active layer is T, and a margin of the ceramic body in the length direction is F, 1.2≦E/T and 30 μm≦F are satisfied.
Abstract:
There is provided a multilayered ceramic capacitor, including: a ceramic body having a plurality of dielectric layers laminated therein; an active layer including a plurality of internal electrodes having the respective dielectric layers interposed therebetween; an upper cover layer; a lower cover layer; external electrodes; and a plurality of dummy electrodes, wherein, when A is defined as ½ of an overall thickness of the ceramic body, B is defined as the thickness of the lower cover layer, C is defined as ½ of an overall thickness of the active layer, and D is defined as the thickness of the upper cover layer, a ratio of deviation between a center portion of the active layer and a center portion of the ceramic body, (B+C)/A, satisfies 1.063≦(B+C)/A≦1.745.
Abstract:
An electronic device includes a first substrate, a second substrate that is disposed to be superposed over the first substrate, a connector that connects the first substrate to the second substrate, an inter-substrate frame that is disposed between the first substrate and the second substrate and includes a wall portion, and a wall member that is disposed on at least one of the first substrate and the second substrate to be opposed to the wall portion and locks the wall portion of the inter-substrate frame in response to displacement that is generated between the first substrate and the second substrate.
Abstract:
A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; and upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer.