Abstract:
Systems and methods in accordance with embodiments of the invention generate tunable electromagnetic waves using carbon nanotube-based field emitters. In one embodiment, a CNT-based irradiator includes: at least one CNT-based cathode, itself including: a plurality of carbon nanotubes adjoined to a substrate; a plurality of anodic regions; where each anodic region is configured to emit a distinctly different class of photons in a direction away from the at least one cathode in response to a same reception of electrons; where each of the plurality of anodic regions is operable to receive electrons emitted from at least one of said at least one CNT-based cathode; and where each of the at least one CNT-based cathode and the plurality of anodic regions are disposed within a vacuum encasing.
Abstract:
A micro-scaled bi-material lattice structure includes a frame comprising a first material having a first coefficient of expansion and defining a plurality of unit cells. The bi-material lattice structure further includes a plurality of plates comprising a second material having a second coefficient of expansion different from the first coefficient of expansion. One of the plates is connected to each unit cell. The bi-material lattice structure has a third coefficient of expansion different from both the first coefficient of the expansion and the second coefficient of expansion, and the bi-material lattice structure has a thickness of about 100 nm to about 3000 microns.
Abstract:
A silicon alignment pin is used to align successive layer of component made in semiconductor chips and/or metallic components to make easier the assembly of devices having a layered structure. The pin is made as a compressible structure which can be squeezed to reduce its outer diameter, have one end fit into a corresponding alignment pocket or cavity defined in a layer of material to be assembled into a layered structure, and then allowed to expand to produce an interference fit with the cavity. The other end can then be inserted into a corresponding cavity defined in a surface of a second layer of material that mates with the first layer. The two layers are in registry when the pin is mated to both. Multiple layers can be assembled to create a multilayer structure. Examples of such devices are presented.
Abstract:
A silicon alignment pin is used to align successive layers of components made in semiconductor chips and/or metallic components to make easier the assembly of devices having a layered structure. The pin is made as a compressible structure which can be squeezed to reduce its outer diameter, have one end fit into a corresponding alignment pocket or cavity defined in a layer of material to be assembled into a layered structure, and then allowed to expand to produce an interference fit with the cavity. The other end can then be inserted into a corresponding cavity defined in a surface of a second layer of material that mates with the first layer. The two layers are in registry when the pin is mated to both. Multiple layers can be assembled to create a multilayer structure. Examples of such devices are presented.
Abstract:
Systems and methods in accordance with embodiments of the invention proficiently produce carbon nanotube-based vacuum electronic devices. In one embodiment a method of fabricating a carbon nanotube-based vacuum electronic device includes: growing carbon nanotubes onto a substrate to form a cathode; assembling a stack that includes the cathode, an anode, and a first layer that includes an alignment slot; disposing a microsphere partially into the alignment slot during the assembling of the stack such that the microsphere protrudes from the alignment slot and can thereby separate the first layer from an adjacent layer; and encasing the stack in a vacuum sealed container.
Abstract:
Systems and methods in accordance with embodiments of the invention implement carbon nanotube-based field emitters. In one embodiment, a method of fabricating a carbon nanotube field emitter includes: patterning a substrate with a catalyst, where the substrate has thereon disposed a diffusion barrier layer; growing a plurality of carbon nanotubes on at least a portion of the patterned catalyst; and heating the substrate to an extent where it begins to soften such that at least a portion of at least one carbon nanotube becomes enveloped by the softened substrate.
Abstract:
A carbon nanotube field emission device with overhanging gate fabricated by a double silicon-on-insulator process. Other embodiments are described and claimed.
Abstract:
Systems and methods in accordance with embodiments of the invention implement carbon nanotube-based field emitters. In one embodiment, a method of fabricating a carbon nanotube field emitter includes: patterning a substrate with a catalyst, where the substrate has thereon disposed a diffusion barrier layer; growing a plurality of carbon nanotubes on at least a portion of the patterned catalyst; and heating the substrate to an extent where it begins to soften such that at least a portion of at least one carbon nanotube becomes enveloped by the softened substrate.
Abstract:
Systems and methods in accordance with embodiments of the invention proficiently produce carbon nanotube-based vacuum electronic devices. In one embodiment a method of fabricating a carbon nanotube-based vacuum electronic device includes: growing carbon nanotubes onto a substrate to form a cathode; assembling a stack that includes the cathode, an anode, and a first layer that includes an alignment slot; disposing a microsphere partially into the alignment slot during the assembling of the stack such that the microsphere protrudes from the alignment slot and can thereby separate the first layer from an adjacent layer; and encasing the stack in a vacuum sealed container.
Abstract:
A deformable mirror is configured to be deformed by surface-parallel actuation. In one embodiment, the deformable mirror includes a first piezoelectric active layer on a first surface of a substrate. The first piezoelectric active layer has a substantially uniform thickness across the first surface of the substrate. The mirror also includes a first electrode layer on the first piezoelectric active layer. The first electrode layer has a plurality of electrodes arranged in a first pattern and has a substantially uniform thickness across the first piezoelectric active layer. The mirror may further include a second piezoelectric layer on the first electrode layer, and a second electrode layer on the second piezoelectric layer. The electrodes of the first and second electrode layers are configured to supply a voltage to the piezoelectric active layers upon actuation to thereby locally deform the shape of the mirror to correct for optical aberrations.