ANTIREFLECTION COATING AND ITS FORMING METHOD

    公开(公告)号:JPH118248A

    公开(公告)日:1999-01-12

    申请号:JP14913698

    申请日:1998-05-29

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To eliminate the reflection of the boundary surface between a resist and an ARC and to drastically improve CD control by making an adjustment for conforming to the optical characteristics of a substrate, and make it useful as a bottom antireflection coating. SOLUTION: A plasma reinforced chemical vapor phase adhesion device 8, used for adhering an amorphous carbon film, includes a reaction chamber 10 and has a throttle valve 11 for isolating the reaction chamber 10 from a vacuum pump. A cathode 19 is electrically connected to an adjustable high-frequency power supply 14, and the impedance between the cathode 19 and the high-frequency power supply 14 is matched by a matching box 13. An amorphous carbon film coating changes the optical constant of the film by changing the process parameters, thus minimizing a reflection factor on the boundary surface between the resist and the substrate and reducing a swing ratio.

    MULTILAYERED STRUCTURE AND ITS MANUFACTURE

    公开(公告)号:JPH11150115A

    公开(公告)日:1999-06-02

    申请号:JP23172998

    申请日:1998-08-18

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To form a resist which has superior optical purity and high adjustability and consists of a plurality of layers by forming an antireflection film on a substrate through vapor deposition. SOLUTION: After an amorphous carbon film a-C:X:H containing hydrogen and fluoride is stuck to a substrate by plasma-intensified chemical gaseous-phase vapor deposition, a photoresist PR containing silicon is applied to the surface of the carbon film a-C:X:H with a spin coater and baked. Then, after the photoresist PR has been developed with a developing solution, the carbon film a-C:X:H is subjected to reactive ion etching in oxygen plasma. As a result, the carbon film a-C:X:H functions as an ideal thick planarized lower antireflection film in a two-layer resist system for ultraviolet and far-infrared rays and can improve line width control and the performance of an integrated circuit.

    METHOD FOR CONTACT OF NOBLE METAL ELECTRODE WITH SILICON, MATERIAL AND STRUCTURE

    公开(公告)号:JPH1174484A

    公开(公告)日:1999-03-16

    申请号:JP15123098

    申请日:1998-06-01

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To prevent silicon from passing through an electrode in one direction to diffuse and oxygen from passing through the electrode in the other direction to diffuse during a high-temperature treatment of a high-dielectric constant dielectric material by a method wherein a barrier layer containing a large quantity of the oxygen is made to interpose between a noble metal layer and a noble metal silicide layer to form a composite layer structure. SOLUTION: A conductive silicon contributory conductive plug 7 and a dielectric layer 8 are formed on a silicon substrate 9 and a noble metal layer 6 is made to adhere on the regions of these of the plug 7 and the layer 8. The plug 7 is buried in the layer 8, the plug 7 is a doped polvsilicon layer and the layer 8 is an SiO2 layer. After this structure is annealed in an atmosphere containing oxygen, the structure is formed into a composite layer structure incorporating the layer 6. Thereby, the oxygen is deposited on the reaction front surface boundary between a noble metal silicide layer and an unreacted noble metal layer during the annealing, a diffusion barrier layer 5 to prevent the unreacted noble metal layer from being consumed more than that is formed to form a three-layer structure consisting of the layer 6, the noble metal silicide layer 3 and the layer 5 between the layers 6 and 3 and silicon and the oxygen are mutually prevented from being diffused.

    ELECTRIC DEVICE AND MANUFACTURE THEREOF

    公开(公告)号:JPH1041474A

    公开(公告)日:1998-02-13

    申请号:JP8622397

    申请日:1997-04-04

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To enable a dielectric structure to be formed inside a non-planar capacitor and a ferroelectric memory cell by a method wherein a recess where a dielectric is deposited is demarcated by a gap between a plate electrode and a stacked electrode. SOLUTION: A capacitor structure 100 is composed of a first electrode or a plate electrode 1 and a second electrode or a stacked electrode 2 surrounded with the plate electrode 1. The plate electrode 1 is isolated from the stacked electrode 2 by a narrow gap filled with a capacitor dielectric body 3. A conductive plug 4 buried in a dielectric body 5 is brought into contact with a conductive region 6 on a board 20. A gap can be formed between the plate electrode 1 and the stacked electrode 2 in a final structure or between one or more sacrifice materials and either the plate electrode 1 or the stacked electrode 2. By this setup, the dielectric body 3 is not required to be deposited through a conformal process such as a chemical vapor deposition method.

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