公开(公告)号：WO02056340A3

公开(公告)日：2003-06-26

申请号：PCT/GB0105716

申请日：2001-12-21

Applicant: IBM ,  IBM UK

Inventor： CABRAL CYRIL ,  CLEVENGER LAWRENCE ,  HSU LOUIS LU-CHEN ,  WONG KEITH KWONG HON

IPC: H01L21/02 ,  H01L21/768 ,  H01L23/525 ,  H01L27/06 ,  H01L23/64

CPC classification number: H01L21/76849 ,  H01L21/7687 ,  H01L21/76888 ,  H01L23/5258 ,  H01L27/0629 ,  H01L28/24 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor structure includes at least one fuse, resistor, diffusion barrier or capacitor that is formed of refractory metal-silicon-nitrogen. A suitable refractory material is TaSiN which provides a wide range of resistivity by changing the ratio of Ta:Si:N.

Abstract translation: 半导体结构包括由难熔金属硅 - 氮形成的至少一个熔丝，电阻器，扩散阻挡层或电容器。 合适的耐火材料是TaSiN，其通过改变Ta:Si:N的比例来提供宽范围的电阻率。

公开(公告)号：AT465516T

公开(公告)日：2010-05-15

申请号：AT04766739

申请日：2004-09-08

Applicant: IBM

Inventor： CABRAL CYRIL ,  IEONG MEIKEI ,  KEDZIERSKI JAKUB

IPC: H01L21/8238 ,  H01L21/28 ,  H01L21/336

Abstract: A method of fabricating complementary metal oxide semiconductor (CMOS) field effect transistors which includes selective doping and full silicidation of a polysilicon material comprising the gate electrode of the transistor. In one embodiment, prior to silicidation, the polysilicon is amorphized. In a further embodiment, siliciding is performed at a low substrate temperature.

公开(公告)号：DE69420004T2

公开(公告)日：2000-03-30

申请号：DE69420004

申请日：1994-10-06

Applicant: IBM

Inventor： CABRAL CYRIL ,  CLEVENGER LAWRENCE ALFRED ,  D HEURLE FRANCOIS MAX ,  HARPER JAMES MCKELL EDWIN ,  MANN RANDY WILLIAM ,  MILES GLEN LESTER ,  RAKOWSKI DONALD WALTER DOUGLAS

IPC: C23C20/02 ,  C30B1/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  C30B1/00

Abstract: The phase transformation temperature of a metal silicide layer formed overlying a silicon layer on a semiconductor wafer is lowered. First, a refractory metal is disposed proximate to the surface of the silicon layer, a precursory metal is deposited in a layer overlying the refractory metal, and the wafer is heated to a temperature sufficient to form the metal silicide from the precursory metal. The precursory metal may be a refractory metal, and is preferably titanium, tungsten, or cobalt. The concentration of the refractory metal at the surface of the silicon layer is preferably less than about 10 atoms/cm . The refractory metal may be Mo, Co, W, Ta, Nb, Ru, or Cr, and more preferably is Mo or Co. The heating step used to form the silicide is performed at a temperature less than about 700 DEG C, and more preferably between about 600-700 DEG C. Optionally, the wafer is annealed following the step of disposing the refractory metal and prior to the step of depositing the precursory metal layer. Preferably, this annealing step is performed at a wafer temperature of at least about 900 DEG C.

公开(公告)号：AT460746T

公开(公告)日：2010-03-15

申请号：AT04812387

申请日：2004-11-29

Applicant: IBM

Inventor： CABRAL CYRIL ,  DETAVERNIER CHRISTOPHER ,  JAMMY RAJARAO ,  SAENGER KATHERINE

IPC: H01L21/8238 ,  C23C14/06 ,  C23C16/32 ,  H01L27/108 ,  H01L29/49

Abstract: A semiconductor device such as a complementary metal oxide semiconductor (CMOS) including at least one FET that includes a gate electrode including a metal carbide and method of fabrication are provided. The CMOS comprises dual work function metal gate electrodes whereby the dual work functions are provided by a metal and a carbide of a metal.

公开(公告)号：AU2002216238A1

公开(公告)日：2002-07-24

申请号：AU2002216238

申请日：2001-12-21

Applicant: IBM

Inventor： CABRAL CYRIL ,  HSU LOUIS LU-CHEN ,  WONG KEITH KWONG HON ,  CLEVENGER LAWRENCE

IPC: H01L21/02 ,  H01L21/768 ,  H01L23/525 ,  H01L27/06 ,  H01L23/64

Abstract: A semiconductor structure that includes at least one circuit element of a fuse, a diffusion barrier or a capacitor that is formed by refractory metal-silicon-nitrogen is disclosed. A method for fabricating such semiconductor structure that includes a fuse element, a diffusion barrier, a resistor or a capacitor by a refractory metal-silicon-nitrogen material is further disclosed. A suitable refractory metal-silicon-nitrogen material to be used is TaSiN which provides a wide range of resistivity by changing the ratio of Ta:Si:N. The invention provides the benefit that the various components of diffusion barriers, fuses, capacitors and resistors may be formed by a single deposition process of a TaSiN layer, the various components are then selectively masked and treated by either heat-treating or ion-implantation to vary their resistivity selectively while keeping the other shielded elements at the same resistivity.

公开(公告)号：DE69420004D1

公开(公告)日：1999-09-16

申请号：DE69420004

申请日：1994-10-06

Applicant: IBM

Inventor： CABRAL CYRIL ,  CLEVENGER LAWRENCE ALFRED ,  D HEURLE FRANCOIS MAX ,  HARPER JAMES MCKELL EDWIN ,  MANN RANDY WILLIAM ,  MILES GLEN LESTER ,  RAKOWSKI DONALD WALTER DOUGLAS

IPC: C23C20/02 ,  C30B1/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  C30B1/00

Abstract: The phase transformation temperature of a metal silicide layer formed overlying a silicon layer on a semiconductor wafer is lowered. First, a refractory metal is disposed proximate to the surface of the silicon layer, a precursory metal is deposited in a layer overlying the refractory metal, and the wafer is heated to a temperature sufficient to form the metal silicide from the precursory metal. The precursory metal may be a refractory metal, and is preferably titanium, tungsten, or cobalt. The concentration of the refractory metal at the surface of the silicon layer is preferably less than about 10 atoms/cm . The refractory metal may be Mo, Co, W, Ta, Nb, Ru, or Cr, and more preferably is Mo or Co. The heating step used to form the silicide is performed at a temperature less than about 700 DEG C, and more preferably between about 600-700 DEG C. Optionally, the wafer is annealed following the step of disposing the refractory metal and prior to the step of depositing the precursory metal layer. Preferably, this annealing step is performed at a wafer temperature of at least about 900 DEG C.