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    COPPER INTERCONNECTION OF METAL SEED LAYER INSERTION STRUCTURE
    2.
    发明专利
    COPPER INTERCONNECTION OF METAL SEED LAYER INSERTION STRUCTURE 失效

    公开(公告)号：JPH11340229A

    公开(公告)日：1999-12-10

    申请号：JP11751399

    申请日：1999-04-26

    Applicant: IBM

    Inventor： EDELSTEIN DANIEL CHARLES ,  HARPER JAMES MCKELL EDWIN ,  HU CHAO-KUN ,  SIMON ANDREW H ,  UZOH CYPRIAN EMEKA

    IPC: H01L23/52 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/532

    Abstract: PROBLEM TO BE SOLVED: To provide an interconnected structure of copper alloys having improved electromigration resistance force, adhesion and other surface characteristics. SOLUTION: Copper conductor bodies 56 and 60 and a copper alloy or metal seed layer 76 disposed between the copper conductor bodies and an electronic device are utilized to provide a novel interconnected structure for establishing electrical communication with the electronic device. In order to improve the electromigration resistance force, an adhesion property to a barrier layer, device surface characteristics or an adhesion process, copper-based seed layers of various decompositions or a specific metal seed layer can be used according to each purpose.

    Copper interconnection structure incorporating a metal seed layer
    3.
    发明专利
    Copper interconnection structure incorporating a metal seed layer 未知

    公开(公告)号：SG77224A1

    公开(公告)日：2000-12-19

    申请号：SG1999001210

    申请日：1999-03-22

    Applicant: IBM

    Inventor： EDELSTEIN DANIEL CHARLES ,  HARPER JAMES MCKELL EDWIN ,  KU CHAO-KUN ,  SIMONS ANDREW H ,  UZOH CYPRIAN EMEKA

    IPC: H01L21/3205 ,  H01L23/52 ,  H01L21/768 ,  H01L23/532 ,  H01L23/525

    Abstract: The present invention discloses an interconnection structure for providing electrical communication with an electronic device which includes a body that is formed substantially of copper and a seed layer of either a copper alloy or a metal that does not contain copper sandwiched between the copper conductor body and the electronic device for improving the electromigration resistance, the adhesion property and other surface properties of the interconnection structure. The present invention also discloses methods for forming an interconnection structure for providing electrical connections to an electronic device by first depositing a seed layer of copper alloy or other metal that does not contain copper on an electronic device, and then forming a copper conductor body on the seed layer intimately bonding to the layer such that electromigration resistance, adhesion and other surface properties of the interconnection structure are improved.

    SINGLE AXIS COMBINED ION AND VAPOUR SOURCE
    4.
    发明专利
    SINGLE AXIS COMBINED ION AND VAPOUR SOURCE 未知

    公开(公告)号：DE3477711D1

    公开(公告)日：1989-05-18

    申请号：DE3477711

    申请日：1984-04-25

    Applicant: IBM

    Inventor： HARPER JAMES MCKELL EDWIN ,  KLEINSASSER ALAN WILLIS

    IPC: H01L21/31 ,  C23C14/22 ,  C23C14/54 ,  H01J37/08 ,  H01J37/305 ,  H01L21/203 ,  H01L39/24 ,  H01J37/32 ,  C23C14/00 ,  H01J27/08

    Abstract: An ion chamber 1 houses a crucible anode 2 containing ion source material 3 and connected to a positive power supply. A cathode 5 is heated by current from source 7 and an electric field is established between the cathode and anode by voltage source 6. A DC bias is established by second voltage source 11. A second anode 15 is connected to the anode 2 by variable resistor 16. The chamber 1 is covered by a DC biassed grid 12 and is filled with ionizable gas via inlet 40. … By varying the resistor 16 from a low value to a high value the cathode/anode current can be shifted from the auxiliary anode 15 to the crucible anode 2 thereby varying the rate of evaporation of the source material. This gives rise to an evaporant stream 8. At the same time the gas is ionized to form an ion beam 14.

    FLUXLESS SOLDERING PROCESS
    6.
    发明专利
    FLUXLESS SOLDERING PROCESS 未知

    公开(公告)号：DE3265496D1

    公开(公告)日：1985-09-26

    申请号：DE3265496

    申请日：1982-02-02

    Applicant: IBM

    Inventor： GREBE KURT RUDOLPH ,  HARPER JAMES MCKELL EDWIN

    IPC: H05K3/34 ,  B23K1/005 ,  B23K1/20 ,  B23K17/00 ,  C23G5/00 ,  H01L21/48 ,  H01L21/52 ,  H01L21/60

    Abstract: A method of fluxlessly joining members e.g. solder pads, having relatively low melting materials is described. The members to be joined are exposed in a non-oxydising atmosphere to ion beam radiation of sufficient intensify and for a time sufficiently long to cause cleaning of the low melting materials by removal of contaminating surface oxide layers. The members are then placed into juxtaposition with each other and are heated for a time sufficient to cause reflow of the low melting materials which upon cooling joins said members. The members may be heated conventionally or may be exposed again to an ion beam radiation to effect joining. In a second example, contacting members are cleaned and reflowed in a single step by exposure to an ion beam radiation. In the Figure an ion beam 28 impinges on solder pads 32 on a chip 30 and on matching solder pads 38 on a substrate 36. After cleaning the pads the chip 30 is flipped on to the substrate 36, (indicated by the arrow), and further heated, e.g. by further radiation, to effect joining by solder reflow.

    8.
    发明专利
    未知

    公开(公告)号：DE69420004T2

    公开(公告)日：2000-03-30

    申请号：DE69420004

    申请日：1994-10-06

    Applicant: IBM

    Inventor： CABRAL CYRIL ,  CLEVENGER LAWRENCE ALFRED ,  D HEURLE FRANCOIS MAX ,  HARPER JAMES MCKELL EDWIN ,  MANN RANDY WILLIAM ,  MILES GLEN LESTER ,  RAKOWSKI DONALD WALTER DOUGLAS

    IPC: C23C20/02 ,  C30B1/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  C30B1/00

    Abstract: The phase transformation temperature of a metal silicide layer formed overlying a silicon layer on a semiconductor wafer is lowered. First, a refractory metal is disposed proximate to the surface of the silicon layer, a precursory metal is deposited in a layer overlying the refractory metal, and the wafer is heated to a temperature sufficient to form the metal silicide from the precursory metal. The precursory metal may be a refractory metal, and is preferably titanium, tungsten, or cobalt. The concentration of the refractory metal at the surface of the silicon layer is preferably less than about 10 atoms/cm . The refractory metal may be Mo, Co, W, Ta, Nb, Ru, or Cr, and more preferably is Mo or Co. The heating step used to form the silicide is performed at a temperature less than about 700 DEG C, and more preferably between about 600-700 DEG C. Optionally, the wafer is annealed following the step of disposing the refractory metal and prior to the step of depositing the precursory metal layer. Preferably, this annealing step is performed at a wafer temperature of at least about 900 DEG C.

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