公开(公告)号：DE10058324B4

公开(公告)日：2007-12-13

申请号：DE10058324

申请日：2000-11-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHNEIDER RALF ,  WIRTH NORBERT ,  BENZINGER HERBERT

IPC: G11C7/22 ,  G11C7/10

公开(公告)号：DE102004015831B4

公开(公告)日：2007-07-12

申请号：DE102004015831

申请日：2004-03-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： CAMPENHAUSEN AUREL VON ,  SCHNEIDER RALF ,  GNAT MARCIN ,  VOLLRATH JOERG

IPC: G01R31/28 ,  B60T8/34 ,  G01R31/27 ,  G11C29/48 ,  G11C29/50

Abstract: An integrated circuit includes a circuit component, a first control circuit and a switchable resistance network. An input voltage is fed to the circuit component on the input side. A control signal generated by the first control circuit is fed to the control terminal of the circuit component. With the switchable resistance network, the first resistance or the second resistance is connected between an output terminal of the circuit component and the output terminal of the integrated circuit to generate a voltage drop between the input side and the output terminal of the circuit component. The integrated circuit makes it possible to generate a current at the output terminal of the circuit component in a manner dependent on the control signal and the voltage dropped between the input side and the output terminal of the circuit component. Families of characteristic curves of transistors of an integrated circuit are determined by the integrated circuit.

公开(公告)号：DE102004022425A1

公开(公告)日：2005-12-01

申请号：DE102004022425

申请日：2004-05-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PROELL MANFRED ,  KLIEWER JOERG ,  SCHNEIDER RALF ,  SCHROEDER STEPHAN

IPC: G05F1/595 ,  G11C5/14 ,  G11C7/00 ,  G11C11/4074

Abstract: An integrated circuit includes an input terminal (IN) for application of a supply voltage (Vext) and an output terminal (A) for generation of an output voltage (Vout). A first branch including a first controllable resistance (T 1 ) and a second branch including a charge pump ( 10 ) and a second controllable resistance (T 2 ) are connected between the input terminal (IN) and the output terminal (A). A control circuit ( 20 ) alters the resistance values of the first and second controllable resistances (T 1 , T 2 ) in a manner dependent on a ratio of an actual value (Vout) of the output voltage to a desired value (VSout) of the output voltage and a ratio of an actual value (Vext) of the supply voltage to a desired value (VSext) of the supply voltage. As a result, the output voltage (Vout) can be stabilized to the desired value (VSout) virtually independently of fluctuations of the supply voltage.

公开(公告)号：DE102004015831A1

公开(公告)日：2005-10-27

申请号：DE102004015831

申请日：2004-03-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： CAMPENHAUSEN AUREL VON ,  SCHNEIDER RALF ,  GNAT MARCIN ,  VOLLRATH JOERG

IPC: B60T8/34 ,  G01R31/27 ,  G01R31/28 ,  G11C29/48 ,  G11C29/50

Abstract: An integrated circuit includes a circuit component, a first control circuit and a switchable resistance network. An input voltage is fed to the circuit component on the input side. A control signal generated by the first control circuit is fed to the control terminal of the circuit component. With the switchable resistance network, the first resistance or the second resistance is connected between an output terminal of the circuit component and the output terminal of the integrated circuit to generate a voltage drop between the input side and the output terminal of the circuit component. The integrated circuit makes it possible to generate a current at the output terminal of the circuit component in a manner dependent on the control signal and the voltage dropped between the input side and the output terminal of the circuit component. Families of characteristic curves of transistors of an integrated circuit are determined by the integrated circuit.

公开(公告)号：DE102004014454A1

公开(公告)日：2005-10-20

申请号：DE102004014454

申请日：2004-03-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHNEIDER RALF ,  CAMPENHAUSEN AUREL VON ,  VOLLRATH JOERG ,  GNAT MARCIN

IPC: G01R27/26 ,  G01R31/28 ,  G01R31/30 ,  G01R31/3187 ,  G04F10/00 ,  G11C29/00 ,  G11C29/02

Abstract: An integrated semiconductor memory, which can be operated in a normal operating state and a test operating state, includes a current pulse circuit with an input terminal for applying an input signal. The current pulse circuit is connected to an output terminal via an interconnect for carrying a current. In the test operating state, the current pulse circuit generates at least one first current pulse with a first, predetermined time duration in a first test cycle and at least one second current pulse with a second, unknown time duration in a subsequent second test cycle. In addition to a first current flowing on the interconnect in the normal operating state, a second current flows on the interconnect during the first test cycle and a third current flows during the second test cycle in the test operating state.

公开(公告)号：DE10358038A1

公开(公告)日：2005-07-21

申请号：DE10358038

申请日：2003-12-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHNEIDER RALF ,  SCHROEDER STEPHAN ,  PROELL MANFRED ,  AUGE JUERGEN

IPC: G11C7/00 ,  G11C11/407 ,  G11C16/04 ,  G11C29/44

Abstract: An integrated circuit includes a programming circuit ( 10 ) for generating programming signals (PS 1 , . . . , PS 4 ) with a first input terminal (E 1 ) for applying a control voltage (ES), a second input terminal (E 2 ) for applying a reference voltage (Vref), a storage circuit ( 30 ) with programmable switches ( 35, . . . , 38 ) and output terminals (A 1 , . . . , A 4 ). The programming circuit in each case generates a programming signal (PS 1 , . . . , PS 4 ) when the control voltage (ES) exceeds a predefined threshold voltage formed from the reference voltage. The number of programming signals (PS 1 , . . . , PS 4 ) is dependent on the magnitude of the threshold voltage exceeded by the control voltage (ES). The programming signals are used for programming the programmable switches ( 35, . . . , 38 ). The programming state of the programmable switches can be read out via the output terminals (A 1 , . . . , A 4 ) of the integrated circuit. The integrated circuit enables the storage of external operating parameters of the integrated circuit.

公开(公告)号：DE10322541A1

公开(公告)日：2004-12-16

申请号：DE10322541

申请日：2003-05-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PROELL MANFRED ,  STAVROU EVANGELOS ,  SCHNEIDER RALF ,  HARTNER TOBIAS

IPC: G11C7/24 ,  G11C8/00 ,  G11C29/18 ,  G11C29/00 ,  G11C8/10

Abstract: The memory chip has an integral address scrambling unit (22,23) which has address inputs for entering an address. The address scrambling unit is arranged and adapted such that the addresses can be scrambled differently dependent on the control bits. A memory cell field is provided and is connected to the output of the address scrambling unit. The scrambling unit may have several predefined scramblers for scrambling the addresses in different ways. Independent claims also cover a method of scrambling addresses.

公开(公告)号：DE10259055A1

公开(公告)日：2004-07-15

申请号：DE10259055

申请日：2002-12-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHNEIDER RALF ,  SCHROEDER STEPHAN ,  PROELL MANFRED ,  VOLLRATH JOERG

IPC: G05F1/46 ,  G11C11/4074 ,  H02M3/07

公开(公告)号：DE10259054A1

公开(公告)日：2004-07-15

申请号：DE10259054

申请日：2002-12-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHNEIDER RALF ,  SCHROEDER STEPHAN ,  PROELL MANFRED ,  VOLLRATH JOERG

IPC: G05F3/30 ,  G05F1/46 ,  H02M3/07 ,  G11C16/30 ,  G11C11/4074

Abstract: A voltage generator arrangement supplies a largely constant output voltage with a high current driver capability. A bandgap reference circuit is downstream from an impedance converter and downstream a voltage generator. The bandgap reference circuit and the impedance converter on the one hand and the voltage generator on the other hand are connected to different reference ground potential line. The impedance converter contains a charge pump circuit to provide increased control potential, which drives the voltage generator. The voltage generator in contrast produces a reduced output potential. The influence of any voltage drop on that reference ground potential line to which the voltage generator is connected in the output potential is thus likewise reduced.

公开(公告)号：DE10161049A1

公开(公告)日：2003-07-10

申请号：DE10161049

申请日：2001-12-12

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHNEIDER RALF ,  BUCKSCH THORSTEN

IPC: G01R31/30 ,  G01R31/3187 ,  G01R31/3193 ,  H01L21/66 ,  G06F11/26

Abstract: An integrated test circuit, as part of an integrated circuit, includes phase-shifted test signals fed through inputs A and B. These test signals are conducted through a plurality of cascaded delay elements, the advancing of the first test signal through the delay elements being held and evaluated by the second test signal.