Abstract:
A monolithic integrable R-2R resistor network comprises a number of series resistors connected to a terminal resistor; and a plurality of 2R resistor units each capable of being switched by two electronic switches either to ground or to another reference point, a different plurality of 2R resistor units being coupled to the nodes between each of the series resistors, to the node between the terminal resistor and the last resistor of the series resistors and to the node ahead of the first resistor of the series resistors. To compensate for the effects of the variations of the switch resistances caused during manufacture by process parameter fluctuations upon the accuracy of a D/A converter, a switch structure is inserted at each of the nodes which, with respect to the two electronic switches, is of the same kind, and which is permanently in an electrically conducting state. Preferably, there are used insulated-gate field-effect transistors and insulated-gate field-effect transistor structures, the identical electrodes of which, for example, the source electrodes, are directly connected to each of the nodes.
Abstract:
A plurality of metal resistance elements and a metal resistance element for compensation use are formed on a common substrate and placed under the same temperature condition. A reference current is applied to the metal resistance element for compensation use to yield an auxiliary reference voltage. A plurality of switches are individually connected in series to the reference metal resistance elements and the auxiliary reference voltage is provided to the series circuits to selectively control the switches, thereby obtaining various currents.
Abstract:
A multi-stage resistive ladder network which uses extra stages to trim out resistance discrepencies. All of the stages are interconnected in a series. Nominally, current is divided in half within each stage. Half of the current is gated onto a bus in response to logic control signals, and the other half of the current is passed onto the next succeeding stage. Due to various processing limitations, the resistors comprising each stage vary slightly from their nominal value, which in turn upsets the current division. To compensate for this additional current dividing stages are serially connected to the last stage of the ladder. Current from these additional stages are selectively coupled onto the bus in response to the logic signals in addition to the current which is normally coupled thereto.
Abstract:
The invention concerns a digital coder subject to a compression law having multiple linear segments with slopes decreasing in geometrical progression having a ratio of 1/2, in which a chain of threshold detectors in a linear progression is used a first time to determine the number of the segment, then a second time to determine the position of the level on the segment.
Abstract:
A digital analog converter and an operating method thereof are provided to control an electrical parameter without maintaining linearity in a system requiring a point to point control based on a lookup table by outputting an increasing analog value with the point to point nonlinear characteristic by corresponding to a digital input value. A digital analog converter converts a digital input value comprised of N bits into the 2N analog values and outputs the converted value. A nonlinear reference signal generator(20) includes a decoder and a signal generator(24). A signal generator includes a power unit, a device part, and a voltage divider. A power supply unit supplies the reference voltage. The device part includes 2n devices with different impedance connected in series. The voltage divider outputs the distribution voltage in proportion to the sum of impedance about the number of devices corresponding to the digital input value among the 2n devices as the analog value.