公开(公告)号：EP1764830A2

公开(公告)日：2007-03-21

申请号：EP05447238.6

申请日：2005-10-21

Applicant: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM ( IMEC)

Inventor： Beyer, Gerald

IPC: H01L21/768 ,  H01L21/3105 ,  H01L21/311

CPC classification number: H01L21/31111 ,  B81C1/00595 ,  B81C2201/0132 ,  B81C2201/0133 ,  H01L21/31633 ,  H01L21/76224 ,  H01L21/76816

Abstract: The present invention relates to a method for the production of very small trenches in semiconductor devices.
The formation of these small trenches is based on chemically changing the properties of a first dielectric layer locally, such that the side walls of a patterned hole in said first dielectric layer are converted locally and become etchable by a first etching substance. Subsequently a second dielectric material is deposited in the patterned structure and the damaged part of the first dielectric material is removed such that small trenches are obtained.
The small trenches obtained by chemically changing the properties of a dielectric layer can be used as test vehicle to study barrier deposition, copper plating and seedlayer deposition within very small trenches (order 10-30 nm).

Abstract translation: 本发明涉及在半导体器件中制造非常小的沟槽的方法。 这些小沟槽的形成是基于局部化学地改变第一介电层的性质，使得所述第一介电层中的图案化孔的侧壁被局部转化并且可被第一蚀刻物质蚀刻。 随后，在图案化结构中沉积第二介电材料，并且去除第一介电材料的损坏部分，从而获得小的沟槽。 通过化学改变电介质层的性质获得的小沟槽可以用作测试载体，以研究在非常小的沟槽（10-30nm）内的阻挡层沉积，铜电镀和种子层沉积。

公开(公告)号：EP1364396A4

公开(公告)日：2005-08-31

申请号：EP02718901

申请日：2002-02-05

Applicant: BECTON DICKINSON CO

Inventor： EVANS JOHN D ,  KELLER CHRIS

IPC: A61B5/15 ,  A61M5/32 ,  A61M35/00 ,  A61M37/00 ,  B61C1/00 ,  B81B1/00 ,  B81C1/00 ,  B44C1/22 ,  H01L21/302

CPC classification number: A61M37/0015 ,  A61B5/14514 ,  A61B5/150022 ,  A61B5/150282 ,  A61B5/150984 ,  A61M2037/003 ,  A61M2037/0053 ,  B81B2201/055 ,  B81C1/00111 ,  B81C2201/0133

Abstract: A microprotrusion array is formed from a silicon wafer by a plurality of sequential plasma and wet isotropic and anisotropic etching steps. The resulting microprotrusions have sharpened tips or cutting edges formed by a wet isotropic etch.

公开(公告)号：EP1403211A2

公开(公告)日：2004-03-31

申请号：EP03255693.8

申请日：2003-09-11

Applicant: PTS Corporation

Inventor： Staple, Bevan ,  Buriak, Jilian

IPC: B81B3/00

CPC classification number: B82Y30/00 ,  B81C1/00476 ,  B81C1/00801 ,  B81C2201/0114 ,  B81C2201/0133 ,  B81C2201/0139 ,  B81C2201/053

Abstract: A microelectromechanical structure is formed by depositing sacrificial and structural material over a substrate to form a structural layer on a component electrically attached with the substrate (step 102). The galvanic potential of the structural layer is greater than the galvanic potential of the component. At least a portion of the structural material is covered with a protective material that has a galvanic potential less than or equal to the galvanic potential of the component (step 104 or 106). The sacrificial material is removed with a release solution (step 108 or 110). At least one of the protective material and release solution is surfactanated, the surfactant functionalizing a surface of the component.

Abstract translation: 形成微机电结构涉及沉积牺牲和结构材料在底物，至少覆盖所述结构层的一部分与保护性材料，其中所述保护性材料构成的电势小于或等于所述组件的电势，并 用剥离溶液除去牺牲材料。 形成微机电结构涉及沉积牺牲和结构材料在基材以形成与基材，其中，所述结构层构成的电势比所述部件的电势更高的电连接的部件上的结构层; 至少覆盖有保护性材料，其中所述保护性材料构成的电势小于或等于所述组件的电势，所述结构层的一部分; 并用剥离溶液，其中该释放溶液和保护材料中的至少一个被surfactanated除去牺牲材料。 因此独立claimsoft被包括为用于制造装置，其包括沉积材料在基板的层的方法，至少覆盖材料层的一部分与保护材料，浸渍基材电解质在一个，以及将 电解质和基板之间的电势差。

公开(公告)号：EP1395835A1

公开(公告)日：2004-03-10

申请号：EP02731255.2

申请日：2002-04-05

Applicant: Honeywell International Inc.

Inventor： MALAMETZ, David

IPC: G01P15/08 ,  G01P1/00 ,  B81B3/00

CPC classification number: B81B3/0072 ,  B81B2201/0235 ,  B81B2203/0181 ,  B81B2203/058 ,  B81C2201/0133 ,  G01P1/006 ,  G01P15/097

Abstract: An apparatus and method for suspending and strain isolating a structure is provided, the apparatus having a first elongated flexure having first and second ends structured for connection to a support structure, and a second elongated flexure having first and second ends structured for connection to a structure to be isolated from the support structure. A portion of the second flexure intermediate the first and second ends thereof is interconnected to a portion of the first flexure intermediate the first and second ends thereof. The strain relief structure may be used in an accelerometer. The structure may have a H or X form, where the legs represent the elongated flexures.

公开(公告)号：EP1234799A3

公开(公告)日：2002-12-18

申请号：EP02003900.4

申请日：2002-02-21

Applicant: CANON KABUSHIKI KAISHA

Inventor： Yasuda, Susumu ,  Mizutani, Hidemasa ,  Yagi, Takayuki ,  Shimada, Yasuhiro ,  Hirose, Futoshi ,  Kato, Takahisa

IPC: B81B3/00 ,  B81C1/00 ,  G02B26/10

CPC classification number: G02B26/105 ,  B81B3/0051 ,  B81B3/0067 ,  B81B2201/038 ,  B81B2201/042 ,  B81B2203/0181 ,  B81B2203/058 ,  B81C2201/0133 ,  G02B26/0841 ,  Y10S359/90 ,  Y10S359/904

Abstract: The tiltable-body apparatus including a frame member, a tiltable body, and a pair of torsion springs having a twisting longitudinal axis. The torsion springs are disposed along the twisting longitudinal axis opposingly with the tiltable body being interposed, support the tiltable body flexibly and rotatably about the twisting longitudinal axis relative to the frame member, and include a plurality of planar portions, compliant directions of which intersect each other when viewed along a direction of the twisting longitudinal axis. A center of gravity of the tiltable body is positioned on the twisting longitudinal axis of the torsion springs.

公开(公告)号：EP1198695A1

公开(公告)日：2002-04-24

申请号：EP00951413.4

申请日：2000-07-20

Applicant: LITEF GmbH

Inventor： WIEMER, Maik ,  HILLER, Karla ,  BILLEP, Detlef ,  BRENG, Uwe ,  RYRKO, Bruno ,  HANDRICH, Eberhard

IPC: G01C19/56 ,  G01P15/08

CPC classification number: B81B3/0051 ,  B81B2201/0242 ,  B81C2201/0133 ,  G01C19/56 ,  G01P15/0888

Abstract: The invention relates to a method for the production of a silicon torsion spring, whereby, for instance, the rotational speed in a microstructured torsion spring-mass system can be read. The invention aims at providing low torsional stiffness in comparison with a relatively high transversal stiffness in lateral and vertical direction. According to the invention, a wafer or wafer composite is used to produce a spring having a V-shaped cross section after masking by means of anisotropic wet-chemical etching, said spring extending preferably over the entire thickness of the wafer and being defined laterally by the [111] surfaces only. Two wafers or wafer composites thus prestructured are rotated by 180° and bonded to one another by aligning them in a mirror-inverted manner in such a way that the desired X-shaped cross section is obtained. One advantage provided by the invention is that the technology used in the production of the laterally and vertically rigid rotational spring is comparatively simple.

公开(公告)号：EP3409639A1

公开(公告)日：2018-12-05

申请号：EP18174480.6

申请日：2018-05-28

Applicant: Murata Manufacturing Co., Ltd.

Inventor： FUJII, Hidetoshi

IPC: B81C1/00

CPC classification number: B81C1/00619 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81C1/00587 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/0142 ,  B81C2201/0198 ,  B81C2201/053

Abstract: The disclosure relates to a method for manufacturing recessed micromechanical structures in a MEMS device wafer. First vertical trenches in the device wafer define the horizontal dimensions of both level and recessed structures. The horizontal face of the device wafer and the vertical sidewalls of the first vertical trenches are then covered with a self-supporting etching mask which is made of a self-supporting mask material, which is sufficiently rigid to remain standing vertically in the location where it was deposited even as the sidewall upon which it was deposited is etched away. Recess trenches are then etched under the protection of the self-supporting mask. The method allows a spike-preventing aggressive etch to be used for forming the recess trenches, without harming the sidewalls in the first vertical trenches.

公开(公告)号：EP3382402A1

公开(公告)日：2018-10-03

申请号：EP18163897.4

申请日：2018-03-26

Applicant: Seiko Epson Corporation

Inventor： TANAKA, Satoru

IPC: G01P15/125 ,  G01P15/08

CPC classification number: B81C1/00166 ,  B60R16/0231 ,  B60R25/24 ,  B81B3/0008 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/04 ,  B81B2207/07 ,  B81C2201/0133 ,  B81C2201/0187 ,  G01P15/125 ,  G01P2015/0831

Abstract: A manufacturing method of a physical quantity sensor includes forming a first fixed electrode, a second fixed electrode, and a dummy electrode on a substrate; and a movable body forming. The electrode forming includes forming a first mask layer on the substrate, forming a first electrode material layer by forming a first conductive layer on the substrate and the first mask layer, forming a second conductive layer on the substrate and the first electrode material layer, forming a second mask layer by forming a mask material layer on the second conductive layer, and removing a part of a section of the mask material layer not overlapping the first electrode material layer in plan view, and forming a second electrode material layer by etching the second conductive layer, with the second mask layer as a mask such that the second conductive layer is provided on the first electrode material layer and on the substrate.

公开(公告)号：EP3238233A1

公开(公告)日：2017-11-01

申请号：EP15820159.0

申请日：2015-12-22

Applicant: Commissariat à l'Énergie Atomique et aux Énergies Alternatives

Inventor： POSSEME, Nicolas ,  LANDIS, Stéphan ,  NOURI, Lamia

IPC: H01L21/3065 ,  B81C99/00 ,  G02B5/18 ,  H01L21/308 ,  H01L21/311 ,  H01L21/768 ,  B29D11/00 ,  G02B3/00

CPC classification number: B29D11/00365 ,  B81B2203/0376 ,  B81C1/00103 ,  B81C1/0046 ,  B81C99/009 ,  B81C2201/0133 ,  B81C2201/0136 ,  C23C14/042 ,  C23C14/48 ,  C23C14/5853 ,  C23C14/5873 ,  G02B3/0025 ,  G02B3/0031 ,  G02B3/02 ,  G03F7/0002 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76804 ,  H01L21/76817

Abstract: The invention concerns, in particular, a method for producing patterns in a layer to be etched (410), from a stack comprising at least the layer to be etched (410) and one masking layer (420) overlying the layer to be etched (410), the masking layer (420) having at least one pattern (421), the method comprising at least: a) a step of modifying at least one area (411) of the layer to be etched (410) by ion implantation (430) in line with the at least one pattern (421); b) at least one sequence of steps comprising: b1) a step (440) of enlarging the at least one pattern (421) in a plane in which the layer (410) to be etched mainly extends; b2) a step of modifying at least one area (411', 411'') of the layer to be etched (410) by ion implantation (430) in line with the at least one enlarged pattern (421), the implantation being carried out at a depth less than the implantation depth of the preceding modification step; c) a step (461, 462) of removing the modified areas (411, 411', 411''), the removal comprising a step of etching the modified areas (411, 411', 411'') selectively to the non-modified areas (412) of the layer (410) to be etched.

Abstract translation: 本发明尤其涉及一种用于由至少包括待蚀刻层（410）和覆盖待蚀刻层（410）的一个掩蔽层（420）的叠层产生待蚀刻层（410）中的图案的方法， 410），所述掩模层（420）具有至少一个图案（421），所述方法至少包括：a）通过离子注入（410）修改要蚀刻的层（410）的至少一个区域（411） 430）与所述至少一个图案（421）一致; b）至少一个步骤序列，包括：b1）在待蚀刻的层（410）主要延伸的平面中放大至少一个图案（421）的步骤（440）; b） b2）通过与至少一个放大图案（421）一致的离子注入（430）来修改待蚀刻层（410）的至少一个区域（411'，411“）的步骤， 以小于前一修改步骤的植入深度的深度排出; c）去除所述修改区域（411,411'，411“）的步骤（461,462），所述去除包括选择性地将所述修改区域（411,411'，411”）蚀刻到所述修改区域 将被蚀刻的层（410）的改性区域（412）。

公开(公告)号：EP3150548A1

公开(公告)日：2017-04-05

申请号：EP15800029.9

申请日：2015-05-05

Applicant: CSMC Technologies Fab1 Co., Ltd.

Inventor： HU, Yonggang ,  ZHOU, Guoping

IPC: B81C1/00

CPC classification number: B81C1/00619 ,  B81C1/00 ,  B81C2201/0133 ,  B81C2201/0142

Abstract: An MEMS-based method for manufacturing a sensor comprises the steps of: forming a shallow channel (120) and a support beam (140) on a front surface of a substrate (100); forming a first epitaxial layer (200) on the front surface of the substrate (100) to seal the shallow channel (120); forming a suspended mesh structure (160) below the first epitaxial layer (200); and forming a deep channel (180) at a position on a back surface of the substrate (100) corresponding to the shallow channel (120), so that the shallow channel (120) is in communication with the deep channel (180). In the Method of manufacturing a MEMS-based sensor, when a shallow channel is formed on a front surface, a support beam of a mass block is formed, so the etching of a channel is easier to control, the process is more precise, and the uniformity and the homogeneity of the formed support beam are better.

Abstract translation: 用于制造传感器的基于MEMS的方法包括以下步骤：在衬底（100）的前表面上形成浅沟道（120）和支撑梁（140）; 在所述衬底（100）的前表面上形成第一外延层（200）以密封所述浅沟道（120）; 在所述第一外延层（200）下方形成悬浮网状结构（160）; 以及在与所述浅通道（120）对应的所述基板（100）的背面上的位置处形成深通道（180），使得所述浅通道（120）与所述深通道（180）连通。 在制造基于MEMS的传感器的方法中，当在前表面上形成浅沟道时，形成质量块的支撑梁，因此对沟道的蚀刻更容易控制，处理更精确，并且 形成的支撑梁的均匀性和均匀性更好。