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公开(公告)号:JP2001244855A
公开(公告)日:2001-09-07
申请号:JP2000377458
申请日:2000-12-12
Applicant: ST MICROELECTRONICS SA , ST MICROELECTRONICS NV
Inventor: NORDSTROEM TOMAS , BENGTSSON DANIEL , ISSON OLIVIER
Abstract: PROBLEM TO BE SOLVED: To provide a canceler circuit which can remove far-end crosstalk in a digital subscriber line transmission system. SOLUTION: Modulated data actually sent by a network terminal model are estimated from the frequency components of a discrete multi-tone symbol received by a line terminal modem to evaluate far-end crosstalk as the linear combination of those estimated values. Far-end crosstalk removing circuits for line terminal models are all provided in a centralized system.
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122.
公开(公告)号:JP2001168834A
公开(公告)日:2001-06-22
申请号:JP2000311561
申请日:2000-10-12
Applicant: ST MICROELECTRONICS NV , ST MICROELECTRONICS SA
Inventor: ISAKSSON MIKAEL , OLSSON LENNART , MESTDAGH DENIS JULIEN GILLES
Abstract: PROBLEM TO BE SOLVED: To provide a method for matching timing of DMT frames with the same frame timing in a DMT system adopted by a communication system where the DMT system is adopted as a multi-carrier system, two VDLS systems each having a couple of modems are employed, and at least the two VDSL systems belong to a single-binder group, in common with both the VDSL systems. SOLUTION: This method includes a step, where a temporal deviation of a crosstalk DMT signal added to a received DMT signal and an output thereof are estimated through the estimation employed by a modem to synchronize its own frame timing with timing of a main crosstalk signal frame, a step where autocorrelation is used for a received signal an a copy resulting from the delayed received signal, and a step where a frame border of different DMT components of the received signal by detecting a part of the signal with maximum correlation.
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123.
公开(公告)号:JP2000332795A
公开(公告)日:2000-11-30
申请号:JP2000066967
申请日:2000-03-10
Applicant: ST MICROELECTRONICS SA
Inventor: MONIOT PASCAL
IPC: G06F17/30 , H04L12/70 , H04L12/935 , H04Q11/04 , H04L12/28
Abstract: PROBLEM TO BE SOLVED: To improve speediness and data cost by making a new address correspond to a memory storage location when the bits of a check word in a selected memory location are equal to the corresponding bits of the new address in read mode by using a packed address. SOLUTION: Each word in a memory 30 includes a 10-bit index for identifying a connection, an effective bit, indicating whether a storage location is used for the connection, and a check word of the most significant 20 bits of the address of the connection made to correspond to the storage location. A comparator 45 compares bits which are extracted from the address A and suppressed, by packing with the bits of the check word read out of the selected storage location. When they are equal, the address A copes with the connection of the selected storage location, and the index in the storage location identifies the connection.
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公开(公告)号:JP2000332648A
公开(公告)日:2000-11-30
申请号:JP2000106525
申请日:2000-04-07
Applicant: ST MICROELECTRONICS SA
Inventor: WUIDART LUC , BARDOUILLET MICHEL , ENGUENT JEAN-PIERRE
Abstract: PROBLEM TO BE SOLVED: To reduce heating of a transponder when an operation power to a proximate transponder from a terminal is supplied by a radio by providing a means for detuning an oscillation circuit from a specific transmission frequency when the transponder approaches the terminal. SOLUTION: A terminal 1' is between an output terminal 2p of an amplifier, that is, an antenna coupler 3, and a terminal 2m in a reference potential (generally a ground), and includes an oscillation circuit consisting of a capacity parts 24, a resistor R1 and a serial impedance, that is, an antenna L1. Then, when the oscillation circuit of the terminal 1' and/or the oscillation circuit of a transponder are in a very close coupling relationship, in order to detune these, a phase of a current of the antenna L1 is adjusted to a reference signal REF. This adjustment is executed by changing a capacitance C1 of the oscillation circuit of the terminal 1' and maintaining the antenna current to a constant phase relationship with the reference signal.
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公开(公告)号:JP2000330791A
公开(公告)日:2000-11-30
申请号:JP2000134658
申请日:2000-05-08
Applicant: ST MICROELECTRONICS SA
Inventor: BERNARD BRUNO , GROSSIER NICOLAS , DABBAGH AHMED
Abstract: PROBLEM TO BE SOLVED: To improve the controllability of access to a memory by comparing an address of an address storage queue with a received load address and selecting the operation order of saving operation and loading operation. SOLUTION: A comparator 84 compares X-memory load address inputs 140 and 141 with all effective inputs 182 of the address storage queue SAQX 143. When a matching input is found, a control circuit 160 supplies a signal to a selector 181. The output 182 from the address storage queue 143 becomes effective and is varied in numeral at a memory position before loading operation. The load addresses of the inputs 140 and 141 are arranged in an address load queue LAQX 145. When no match is found, the control circuit 160 operates the selector 181 to obtain an output 183 from the load address inputs 140 and 141 before the address storage queue output 182. The loading operation is carried out in a single cycle while evading the queue 145.
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公开(公告)号:JP2000231515A
公开(公告)日:2000-08-22
申请号:JP2000047617
申请日:2000-02-24
Applicant: ST MICROELECTRONICS SA
Inventor: FARRUGIA AUGUSTIN
Abstract: PROBLEM TO BE SOLVED: To provide a protective device preventing undesirable reprogramming in an erasable and rewritable ROM. SOLUTION: This protective device for an erasable and rewritable ROM 1 is provided with a memory cell 6 and memory cell write and read means 7 and 8 capable of programming the cell 6 to a prescribed state and prevents the programming of the cell 6 from being preprogrammed without prohibiting all data write signals to a memory nor preliminarily erasing the program of the cell 6.
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公开(公告)号:JP2000227951A
公开(公告)日:2000-08-15
申请号:JP32035199
申请日:1999-11-10
Applicant: ST MICROELECTRONICS SA
Inventor: GAULTIER JEAN-MARIE
Abstract: PROBLEM TO BE SOLVED: To increase the number of command functions without increasing the number of commands by varying the method of interpretation when a new command is transmitted before the termination of dead time of a prescribed length, which exists between the same transmitted commands. SOLUTION: When a card receives a new command before the termination of dead time T0 after the reception of a command C, the command transmitted by a word 101 is assumed to be the command C transmitted by a word 100 if a reader transmits the command word 100 and it transmits the new command word 101 before the lapse of time T0. When dead time T0 has passed after the word 101, the charge of an antenna is modulated during time T1 after the termination of time T0 and therefore the reader can be synchronized with the card. Phase displacement after time T1 is transmitted by constituting the state bit of the data word 201. Since the sequence has only a role for making the value of an address counter to a value previous to a value becoming an object by one, it is transmitted at a high speed.
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公开(公告)号:JP2000209080A
公开(公告)日:2000-07-28
申请号:JP33431599
申请日:1999-11-25
Applicant: ST MICROELECTRONICS SA
Inventor: GONTHIER LAURENT
IPC: H03K17/725 , H03K17/687
Abstract: PROBLEM TO BE SOLVED: To control a switch without using a high frequency transformer by forming a bidirectional switch from oppositely parallel connected two unidirectional switches, controlling the switch through a block based on a single DC low voltage source and defining the first terminal of an AC power source, to which the bidirectional switch is connected, as a reference for a DC voltage. SOLUTION: A control circuit is used for controlling a bidirectional switch 1' formed from two diodes D1 and D2 and two N channel MOS transistors 30 and 31 connected in inversely parallel assemblies. The bidirectional switch 1' is controlled by a control block 5 fed by a DC voltage Vdc. The DC voltage Vdc and an AC voltage Vac are serially connected and the potential of a terminal E1 is defined as a reference for the DC voltage Vdc. Namely, the phase of the AC voltage Vac is defined as a reference actually. As a result, only the terminal of an opposite load Q2 at a node A is connected to a neutral point E2 of an AC power source.
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公开(公告)号:JP2000059449A
公开(公告)日:2000-02-25
申请号:JP20765999
申请日:1999-07-22
Applicant: ST MICROELECTRONICS SA
Inventor: MEYER JACQUES
IPC: H04L27/22 , H04L27/00 , H04L27/227
Abstract: PROBLEM TO BE SOLVED: To provide an estimation device for frequency error of a QPSK demodulator that is especially reliable, even in the presence of strong noise. SOLUTION: This method for estimating a frequency error of a demodulator that demodulates two binary signals (I, Q) carried on two carriers with a same frequency and a phase difference of a right angle, consists of a step whose vector components are consecutive pairs of the two binary signals (I, Q) are generated, a step where 4 is multiplied with a phase difference angle when it is equal to a multiple of π/4, and conversion which almost preserves the module is applied to each vector, and a step where a means value of the converted vectors is calculated. A frequency error is obtained as the derivative of an angle of the mean vector.
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公开(公告)号:JP2000040668A
公开(公告)日:2000-02-08
申请号:JP13872099
申请日:1999-05-19
Applicant: ST MICROELECTRONICS SA
Inventor: DUTARTRE DIDIER , JERIER PATRICK
IPC: H01L21/225 , H01L21/205 , H01L21/22 , H01L21/74 , H01L21/8249 , H01L27/06
Abstract: PROBLEM TO BE SOLVED: To limit doping of a growth layer without increasing boron self-doping, by a method wherein an epitaxially grown silicon layer is deposited on a single crystalline silicon substrate that comprises zones of high concentrations of arsenic or phosphorus restraining it from being self-doped with arsenic or phosphorus. SOLUTION: Germanium compound as GeH4 gas is added in the gas phase during an annealing time from a point of time t5 to a point of time t6, a deposition process is stopped from a point, of time t6 to a point, of time t2, and a time t5 to t6 for adding a compound GeH4 is selectively set at ten seconds to tens of seconds. After Ge is deposited, hydrogen is purged for a time (tens of seconds) t6 to t2 at a temperature T1. An epitaxially grown silicon layer is self-doped for a time t3 to t4 and a block doped with arsenic and a non-doped block are formed at this deposition of Ge. Ge is deposited on a second test wafer of an epitaxially grown non-doped silicon layer for a time t5 to t6, and hydrogen is adsorbed and/or desorbed.
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