公开(公告)号：WO2004028952A2

公开(公告)日：2004-04-08

申请号：PCT/US2003/020057

申请日：2003-06-26

Applicant: CORNELL RESEARCH FOUNDATION, INC.

Inventor： SUBRAMANIAN, Kanakasabapathi ,  MACDONALD, Noel C.,

IPC: B81B

CPC classification number: B81C1/00142 ,  B81B2203/0361 ,  B81C1/00071 ,  B81C1/00111 ,  B81C2201/0112 ,  Y10S977/70 ,  Y10S977/762

Abstract: A process cycles between etching and passivating chemistries to create rough sidewalls that are converted into small structures. In one embodiment, a mask is used to define lines in a single crystal silicon wafer. The process creates ripples on sidewalls of the lines corresponding to the cycles. The lines are oxidized in one embodiment to form a silicon wire corresponding to each ripple. The oxide is removed in a further embodiment to form structures ranging from micro sharp tips to photonic arrays of wires. Fluidic channels are formed by oxidizing adjacent rippled sidewalls. The same mask is also used to form other structures for MEMS devices.

Abstract translation: 蚀刻和钝化化学物质之间的过程循环，以产生转变成小结构的粗糙侧壁。 在一个实施例中，使用掩模来限定单晶硅晶片中的线。 该过程在对应于循环的线的侧壁上产生波纹。 在一个实施例中，线被氧化以形成对应于每个纹波的硅线。 在另一个实施方案中去除氧化物以形成从微尖端到光线阵列的结构。 通过氧化相邻的波纹侧壁形成流体通道。 同样的掩模也用于形成MEMS器件的其他结构。

公开(公告)号：WO2003060975A1

公开(公告)日：2003-07-24

申请号：PCT/FR2002/004588

申请日：2002-12-31

Applicant: ALCATEL ,  PUECH, Michel ,  VAN DER DRIFT, Emile

Inventor： PUECH, Michel ,  VAN DER DRIFT, Emile

IPC: H01L21/3065

CPC classification number: B81C1/00619 ,  B81C2201/0112 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/3085

Abstract: Selon l'invention, on traite par gravure au plasma un substrat (2) contenu dans une enceinte (1) dont l'atmosphère (5) est maintenue à faible pression par un dispositif de génération de vide (6, 7). Des moyens de génération de plasma (8) génèrent un plasma (9) qui agit sur la surface (2a) du substrat (2). Le procédé de gravure soumet le substrat (2) à une succession alternée d'étapes comprenant : une étape d'attaque par plasma de gaz de gravure provenant d'une source de gaz de gravure (19), une seconde étape de passivation par plasma de gaz de passivation provenant d'une source de gaz de passivation (20), elle-même suivie d'une étape impulsionnelle de dépassivation sélective par action d'un plasma de gaz de nettoyage provenant d'une source de gaz de nettoyage (21) qui enlève le polymère dans la zone de fond des cavités (2b) de façon plus efficace que le gaz de gravure. Cela permet de réaliser des cavités (2b) ayant un facteur d'aspect supérieur à 30, avec une vitesse augmentée, et une bonne sélectivité vis à vis du masque protégeant le substrat (2).

Abstract translation: 本发明涉及一种方法，其特征在于：通过真空产生装置（6,7）将包含在其中气氛（5）的空气（5）保持在低压的室（1）中的衬底（2）进行等离子体蚀刻处理。 等离子体产生装置（8）产生作用在衬底（2）的表面（2a）上的等离子体（9）。 蚀刻方法包括对基板（2）进行交替连续的步骤，其包括：等离子体蚀刻步骤，其具有源自蚀刻气体源（19）的蚀刻气体;第二等离子体钝化步骤，其具有源自钝化气体源的钝化气体 （20），然后通过来自清洁等离子体气体源（21）的清洁等离子体气体的作用进行选择性等离子体脉冲去钝化步骤，其比蚀刻气体更有效地除去空腔（2b）的基底区域中的聚合物 从而能够以增加的速度形成具有高于30的纵横比的空腔（2b），并且相对于保护基板（2）的掩模具有良好的选择性。

公开(公告)号：US20240304453A1

公开(公告)日：2024-09-12

申请号：US18665377

申请日：2024-05-15

Applicant: ULVAC, INC.

Inventor： TAICHI SUZUKI ,  Yasuhiro MORIKAWA ,  Kenta DOI ,  Toshiyuki NAKAMURA

IPC: H01L21/3065 ,  B81C1/00 ,  C23C14/02 ,  C23C14/34 ,  H01J37/32 ,  H01L21/308 ,  H01L21/311

CPC classification number: H01L21/30655 ,  B81C1/00531 ,  B81C1/00619 ,  C23C14/021 ,  C23C14/34 ,  H01J37/321 ,  H01J37/3244 ,  H01J37/32541 ,  H01J37/32568 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2201/014 ,  H01J2237/3321 ,  H01J2237/3341 ,  H01J2237/3342

Abstract: The present disclosure provides an etching method that includes a resist pattern-forming step of forming a resist layer on a target object, the resist layer being formed of a resin, the resist layer having a resist pattern; an etching step of etching the target object via the resist layer having the resist pattern; and a resist protective film-forming step of forming a resist protective film on the resist layer. The etching step is repetitively carried out multiple times. A processing gas, used in the resist protective film-forming step, includes a gas capable of forming SixOyαz; wherein a is any one of F, Cl, H, and CkHl; and each of x, y, z, k, is a selected non-zero value. After the etching steps are repetitively carried out multiple times, the resist protective film-forming step is performed.

公开(公告)号：US20190242709A1

公开(公告)日：2019-08-08

申请号：US16340863

申请日：2017-12-19

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： TAKASHI IMANAKA ,  SHOICHI TAJI ,  SOICHIRO HIRAOKA ,  KATSUYA MORINAKA

IPC: G01C19/5769 ,  B81B7/00 ,  B81C1/00 ,  G01C19/5733

CPC classification number: G01C19/5769 ,  B81B7/0051 ,  B81B7/02 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/0127 ,  B81B2203/0353 ,  B81C1/00325 ,  B81C2201/0105 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2203/036 ,  G01C19/5733 ,  G01C19/5747 ,  H01L29/84

Abstract: A sensor includes a sensor substrate, and an upper lid substrate joined to an upper surface of the sensor substrate. The sensor substrate includes a fixed part, a deformable beam connected to the fixed part, and a weight connected to the beam. The weight is movable relative to the fixed part. The upper lid substrate includes a first part containing silicon and a second part joined to the first part and containing glass. The first part includes a projection protruding toward the sensor substrate relative to the second part. The sensor has high accuracy or high reliability.

公开(公告)号：US20190202687A1

公开(公告)日：2019-07-04

申请号：US16334196

申请日：2017-09-18

Applicant: Robert Bosch GmbH

Inventor： Arne Dannenberg ,  Torsten Kramer ,  Joachim Fritz ,  Thomas Friedrich

IPC: B81C1/00 ,  B81B7/00 ,  G01L9/00 ,  G01L19/14

CPC classification number: B81C1/00325 ,  B81B7/0048 ,  B81B7/0061 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2203/035 ,  G01L9/0042 ,  G01L9/0045 ,  G01L19/0076 ,  G01L19/146

Abstract: A method for producing a micromechanical pressure sensor. The method includes: providing a MEMS wafer having a silicon substrate and a first cavity developed therein underneath a sensor diaphragm; providing a second wafer; bonding the MEMS wafer to the second wafer; and exposing a sensor core from the rear side; a second cavity being formed in the process between the sensor core and the surface of the silicon substrate, and the second cavity being developed with the aid of an etching process which is carried out using etching parameters that are modified in a defined manner.

公开(公告)号：US09764942B2

公开(公告)日：2017-09-19

申请号：US15147197

申请日：2016-05-05

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： Antti Iihola ,  Altti Torkkeli ,  Ville-Pekka Rytkönen ,  Matti Liukku

IPC: B81B3/00 ,  B81C1/00 ,  G01P15/125 ,  G01P15/18 ,  G01C19/56

CPC classification number: B81B3/0021 ,  B81B3/0094 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/0136 ,  B81B2203/04 ,  B81C1/00357 ,  B81C2201/0112 ,  B81C2201/0132

Abstract: The present invention relates to a micromechanical device comprising a multi-layer micromechanical structure including only homogenous silicon material. The device layer comprises at least a rotor and at least two stators. At least some of the rotor and at least two stators are at least partially recessed to at least two different depths of recession from a first surface of the device layer and at least some of the rotor and at least two stators are at least partially recessed to at least two different depths of recession from a second surface of the device layer.

公开(公告)号：US20170166438A1

公开(公告)日：2017-06-15

申请号：US14969329

申请日：2015-12-15

Applicant: Bucknell C. Webb

Inventor： Bucknell C. Webb

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0056 ,  B81B2201/012 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/04 ,  B81B2207/07 ,  B81C1/0015 ,  B81C1/00619 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2201/0178 ,  B81C2203/0109 ,  B81C2203/0136 ,  H01H59/0009 ,  H01H2001/0078

Abstract: Deep via technology is used to construct an integrated silicon cantilever and cavity oriented in a vertical plane which creates an electrostatically-switched MEMS switch in a small wafer area. Another embodiment is a small wafer area electrostatically-switched, vertical-cantilever MEMS switch wherein the switch cavity is etched within a volume defined by walls grown internally within a silicon substrate using through vias.

公开(公告)号：US09656858B2

公开(公告)日：2017-05-23

申请号：US14336477

申请日：2014-07-21

Applicant: Atlantic Inertial Systems Limited

Inventor： Tracey Hawke ,  Mark Venables ,  Ian Sturland ,  Rebecka Eley

IPC: H01L21/311 ,  H01L21/302 ,  H01L21/461 ,  H01L29/06 ,  B81C1/00 ,  B81B3/00 ,  H01L21/3065 ,  H01L21/308

CPC classification number: B81C1/00531 ,  B81B3/0064 ,  B81B2201/033 ,  B81B2203/033 ,  B81C1/00388 ,  B81C1/00619 ,  B81C2201/0112 ,  H01L21/3065 ,  H01L21/308

Abstract: A method of reactive ion etching a substrate 46 to form at least a first and a second etched feature (42, 44) is disclosed. The first etched feature (42) has a greater aspect ratio (depth:width) than the second etched feature (44). In a first etching stage the substrate (46) is etched so as to etch only said first feature (42) to a predetermined depth. Thereafter in a second etching stage, the substrate (46) is etched so as to etch both said first and said second features (42, 44) to a respective depth. A mask (40) may be applied to define apertures corresponding in shape to the features (42, 44). The region of the substrate (46) in which the second etched feature (44) is to be produced is selectively masked with a second maskant (50) during the first etching stage, The second maskant (50) is then removed prior to the second etching stage.

公开(公告)号：US20170088415A1

公开(公告)日：2017-03-30

申请号：US14872123

申请日：2015-09-30

Applicant: MEMS DRIVE, INC.

Inventor： ROMAN GUTIERREZ ,  TONY TANG ,  XIAOLEI LIU ,  GUIQIN WANG ,  MATTHEW NG

IPC: B81B7/00 ,  B81C1/00

CPC classification number: H01L21/76816 ,  B81B3/0045 ,  B81B7/0029 ,  B81B2203/0353 ,  B81C1/00674 ,  B81C1/00682 ,  B81C2201/0112 ,  B81C2201/0135 ,  H01L21/768 ,  H01L21/76898 ,  H01L23/485 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/1461 ,  H01L2924/181

Abstract: A system and method for manipulating the structural characteristics of a MEMS device include etching a plurality of holes into the surface of a MEMS device, wherein the plurality of holes comprise one or more geometric shapes determined to provide specific structural characteristics desired in the MEMS device.

公开(公告)号：US20160376147A1

公开(公告)日：2016-12-29

申请号：US15171002

申请日：2016-06-02

Applicant: Nivarox-FAR S.A.

Inventor： Alex Gandelhman ,  Andre Pin

IPC: B81C1/00 ,  G04D99/00

CPC classification number: B81C1/00619 ,  B81B2201/035 ,  B81B2203/0384 ,  B81C1/00103 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2201/0138 ,  B81C2201/014 ,  B81C2201/0188 ,  B81C2201/0198 ,  G04B13/02 ,  G04B13/026 ,  G04B13/027 ,  G04D99/00

Abstract: The invention relates to a silicon-based component with at least one reduced contact surface which, formed from a method combining at least one oblique side wall etching step with a “Bosch” etch of vertical side walls, improves, in particular, the tribology of components formed by micromachining a silicon-based wafer.

Abstract translation: 本发明涉及具有至少一个还原接触表面的硅基组分，其由至少一个倾斜侧壁蚀刻步骤与垂直侧壁的“博世”蚀刻法组合的方法形成，特别是改进了摩擦学 通过微加工硅基晶片形成的部件。