Method of making a micro electro mechanical system (MEMS) device
    131.
    发明公开
    Method of making a micro electro mechanical system (MEMS) device 审中-公开
    Herstellungsverfahrenfürein Mikrosystemtechnik-(MST)Bauteil

    公开(公告)号:EP2199252A1

    公开(公告)日:2010-06-23

    申请号:EP08022076.7

    申请日:2008-12-18

    Applicant: Epcos AG

    Abstract: A method of manufacturing a micro electro mechanical system (MEMS) device, comprising the steps of: providing a substrate, depositing an active layer, depositing a sacrificial layer, forming a MEMS structure in the active layer, wherein forming the MEMS structure comprises depositing a capping layer over the sacrificial layer, etching holes into the capping layer, removing the sacrificial layer with a dry etching process.

    Abstract translation: 一种制造微机电系统(MEMS)器件的方法,包括以下步骤:提供衬底,沉积有源层,沉积牺牲层,在有源层中形成MEMS结构,其中形成MEMS结构包括: 覆盖在牺牲层上,将孔蚀刻到覆盖层中,用干蚀刻工艺去除牺牲层。

    Aerogel-bases mold for MEMS fabrication and formation thereof
    133.
    发明公开
    Aerogel-bases mold for MEMS fabrication and formation thereof 审中-公开
    形成Aerogelbasis zur MEMS-Herstellung und -Bildung

    公开(公告)号:EP2082990A2

    公开(公告)日:2009-07-29

    申请号:EP09150686.5

    申请日:2009-01-15

    Abstract: The invention is directed to a patterned aerogel-based layer that serves as a mold for at least part of a microelectromechanical feature. The density of an aerogel is less than that of typical materials used in MEMS fabrication, such as poly-silicon, silicon oxide, single-crystal silicon, metals, metal alloys, and the like. Therefore, one may form structural features in an aerogel-based layer at rates significantly higher than the rates at which structural features can be formed in denser materials. The invention further includes a method of patterning an aerogel-based layer to produce such an aerogel-based mold. The invention further includes a method of fabricating a microelectromechanical feature using an aerogel-based mold. This method includes depositing a dense material layer directly onto the outline of at least part of a microelectromechanical feature that has been formed in the aerogel-based layer.

    Abstract translation: 本发明涉及用作至少部分微机电特征的模具的图案化气凝胶基层。 气凝胶的密度小于MEMS制造中使用的典型材料的密度,例如多晶硅,氧化硅,单晶硅,金属,金属合金等。 因此,可以以比在更致密的材料中形成结构特征的速率显着更高的速率在气凝胶层中形成结构特征。 本发明还包括一种图案化气凝胶层以产生这种基于气凝胶的模具的方法。 本发明还包括使用基于气凝胶的模具制造微机电特征的方法。 该方法包括将致密材料层直接沉积在已经形成在气凝胶层中的微机电特征的至少一部分的轮廓上。

    METHOD FOR PRODUCING COMB DRIVE DEVICES USING ETCH BUFFERS
    135.
    发明公开
    METHOD FOR PRODUCING COMB DRIVE DEVICES USING ETCH BUFFERS 有权
    工艺提供使用ÄTZPUFFERNCOMB触发装置

    公开(公告)号:EP1733468A1

    公开(公告)日:2006-12-20

    申请号:EP04815065.0

    申请日:2004-12-21

    Abstract: Methods of fabricating comb drive devices utilizing one or more sacrificial etch-buffers are disclosed. An illustrative fabrication method may include the steps of etching a pattern onto a wafer substrate defining one or more comb drive elements and sacrificial etch-buffers, liberating and removing one or more sacrificial etch-buffers prior to wafer bonding, bonding the etched wafer substrate to an underlying support substrate, and etching away the wafer substrate. In some embodiments, the sacrificial etch-buffers are removed after bonding the wafer to the support substrate. The sacrificial etch-buffers can be provided at one or more selective regions to provide greater uniformity in etch rate during etching. A comb drive device in accordance with an illustrative embodiment can include a number of interdigitated comb fingers each having a more uniform profile along their length and/or at their ends, producing less harmonic distortion during operation.

    Silicon-on-insulator substrate, its fabrication method and MEMS floating structure formed therein
    136.
    发明公开
    Silicon-on-insulator substrate, its fabrication method and MEMS floating structure formed therein 有权
    硅绝缘体上基板,其制备在其中形成的过程和MEMS谐振结构

    公开(公告)号:EP1650158A1

    公开(公告)日:2006-04-26

    申请号:EP05022281.9

    申请日:2005-10-12

    CPC classification number: B81C1/00579 B81C2201/0132

    Abstract: A silicon-on-insulator (SOI) substrate including laminated layers of a substrate, an oxide layer, and a silicon layer in order. The oxide layer has an electrifying hole fluidly connected with the substrate and the electrifying hole is filled with a part of the silicon layer. A method for fabricating the floating structure is also disclosed which includes the steps of forming an oxide layer having a predetermined thickness on a substrate, forming one or more electrifying holes in an area of the oxide layer corresponding to an inner part of the floating structure, forming a silicon layer on the oxide layer including an electrification structure electrically connecting the silicon layer to the substrate, forming a pattern for the floating structure on the silicon layer, removing the oxide layer corresponding to an inner area of the pattern, forming a thermal oxide layer on a surface of the silicon layer, and removing the thermal oxide layer to form the floating structure.

    Abstract translation: 甲硅绝缘体(SOI)衬底包括层叠在基板层,在氧化物层,并且为了硅层。 得到的氧化物层具有带电流体地与所述基板连接并带电孔填充有所述硅层的一部分。 一种用于制造浮动结构的方法因此盘游离缺失哪些包括氧化物层的上形成的基板上具有一个预定的厚度,在所述氧化物层在所述浮动结构的内部部分对应于一个区域中形成一个或多个带电孔的步骤中, 形成的氧化物层包括在电气化结构电性连接该硅层的基材,形成用于在硅层上的浮动结构的图案,除去氧化层对应于内部的图案的区域中的硅层,在形成热氧化物 层上的硅层的表面上,和除去所述热氧化物层,以形成浮动结构。

    ENVELOPE FOLLOWER END POINT DETECTION IN TIME DIVISION MULTIPLEXED PROCESSES
    137.
    发明公开
    ENVELOPE FOLLOWER END POINT DETECTION IN TIME DIVISION MULTIPLEXED PROCESSES 有权
    终点检测在时分方法使用Hüllkurvenalgorithmus

    公开(公告)号:EP1623457A2

    公开(公告)日:2006-02-08

    申请号:EP04751610.9

    申请日:2004-05-06

    Abstract: The present invention provides a method for establishing endpoint during an alternating cyclical etch process or time division multiplexed process. A substrate is placed within a plasma chamber and subjected to an alternating cyclical process having an etching step and a deposition step. A variation in plasma emission intensity is monitored using known optical emission spectrometry techniques. An amplitude information is extracted from a complex waveform of the plasma emission intensity using an envelope follower algorithm. The alternating cyclical process is discontinued when endpoint is reached at a time that is based on the monitoring step.

    CONDUCTIVE ETCH STOP FOR ETCHING A SACRIFICIAL LAYER
    138.
    发明公开
    CONDUCTIVE ETCH STOP FOR ETCHING A SACRIFICIAL LAYER 审中-公开
    CONDUCTING蚀刻掩模用于蚀刻的受害者LAYER

    公开(公告)号:EP1532658A1

    公开(公告)日:2005-05-25

    申请号:EP03734278.9

    申请日:2003-05-30

    Abstract: In one embodiment, a micro device is formed by depositing a sacrificial layer over a metallic electrode (step 304), forming a moveable structure over the sacrificial layer (step 306), and then etching the sacrificial layer with a noble gas fluoride (step 308). Because the metallic electrode is comprised of a metallic material that also serves as an etch stop in the sacrificial layer etch, charge does not appreciably build up in the metallic electrode. This helps stabilize the driving characteristic of the moveable structure. In one embodiment, the moveable structure is a ribbon in a light modulator.

    VERFAHREN ZUM ANISOTROPEN PLASMAÄTZEN VON HALBLEITERN
    139.
    发明公开
    VERFAHREN ZUM ANISOTROPEN PLASMAÄTZEN VON HALBLEITERN 有权
    方法用于半导体的各向异性等离子体蚀刻

    公开(公告)号:EP1095401A1

    公开(公告)日:2001-05-02

    申请号:EP00931030.1

    申请日:2000-04-26

    Abstract: The invention relates to a method for the anisotropic etching of structures on a semiconductor body, in particular for etching recesses in a silicon body (18) which are defined laterally in a precise manner by an etching mask, using a plasma (28). An ion-accelerator voltage is applied to the semiconductor, at least during an etching step which continues for a predetermined period. Said ion-accelerator voltage is induced, in particular, by a high-frequency alternating current. The duration of the etching step is subdivided further into at least two etching periods, between which the applied ion-accelerator voltage is modified. A preferred embodiment contains two etching periods, whereby a higher accelerator voltage is used during the first etching period than during the second etching period. The duration of the first etching period can also be determined dynamically or statically during the etching steps using a device for detecting a polymer breakthrough. In addition, high frequency pulses or pulse packets with an adjustable pulse-pause ratio are preferably used to generate and adjust the level of the accelerator voltage.

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