公开(公告)号：US20180081481A1

公开(公告)日：2018-03-22

申请号：US15712070

申请日：2017-09-21

Applicant: Apple Inc.

Inventor： Douglas G. FOURNIER ,  James R. KROGDAHL ,  Daniel W. JARVIS ,  Edward S. HUO ,  Lee E. HOOTON ,  Srikanth V. THIRUPPUKUZHI ,  Garrett R. OWOC ,  Michael NGO ,  David A. PAKULA ,  Robert F. MEYER

IPC: G06F3/041 ,  G02F1/1333 ,  G02F1/1343

CPC classification number: H05K7/20481 ,  B32B2307/302 ,  B32B2457/20 ,  G06F1/1637 ,  G06F1/1643 ,  G06F3/0412 ,  G06F3/0414 ,  G06F3/044 ,  G06F2203/04112 ,  H01M2/08 ,  H01M2/1016 ,  H01M2/1022 ,  H01M2220/30 ,  H02J7/0042 ,  H05K1/0216 ,  H05K1/144 ,  H05K1/148 ,  H05K7/20963 ,  H05K9/0033 ,  H05K2201/042 ,  H05K2201/10242 ,  H05K2201/10257

Abstract: An electronic device having a display assembly is disclosed. Several layers may combine to form the display assembly. For example, the display assembly may include a touch sensitive layer (or touch detection layer), a display layer that present visual information, and a force sensitive layer (or force detection layer). The display layer may include a bend or curve that allows a portion of the display layer to bend around the force sensitive layer. Also, the connectors (that provide electrical and mechanical connections) may be positioned at different locations of the layers. For example, the display layer may include a connector on a first edge region, and the force sensitive layer may include a connector on a second edge region that is perpendicular, or at least substantially perpendicular, to the first edge region. By positioning the connectors on perpendicular edge regions, the display assembly may reduce its footprint.

公开(公告)号：US20180014426A1

公开(公告)日：2018-01-11

申请号：US15358742

申请日：2016-11-22

Applicant: Ku Yong KIM

Inventor： Ku Yong KIM

IPC: H05K7/20 ,  H05K1/02 ,  H05K1/18 ,  H05K5/00 ,  H05K1/14

CPC classification number: H05K7/205 ,  H05K1/0204 ,  H05K1/144 ,  H05K1/181 ,  H05K1/182 ,  H05K3/4608 ,  H05K5/0008 ,  H05K7/20472 ,  H05K2201/0367 ,  H05K2201/041 ,  H05K2201/042 ,  H05K2201/09063 ,  H05K2201/09854 ,  H05K2201/1003 ,  H05K2201/10242

Abstract: A PCB module having a multi-surface heat dissipation structure is provided. The PCB module includes: a multi-layer PCB assembly which includes a heat dissipation plate having electrical insulating properties, and an upper PCB and a lower PCB attached to a top surface and a bottom surface of the heat dissipation plate, respectively; an upper case for covering a top surface of the multi-layer PCB assembly; and a lower case for covering a bottom surface of the multi-layer PCB assembly, and the heat dissipation plate includes; a first heat pole which is thermally in contact with an electronic circuit element mounted on the upper PCB or the lower PCB; and a second heat pole which is thermally in contact with an inner surface of at least one of the upper and lower cases.

公开(公告)号：US20170374742A1

公开(公告)日：2017-12-28

申请号：US15629777

申请日：2017-06-22

Applicant: IBIDEN CO., LTD.

Inventor： Takahisa HIRASAWA ,  Takayuki FURUNO ,  Kiyotaka TSUKADA

IPC: H05K1/14 ,  H05K3/46 ,  H05K3/36

CPC classification number: H05K1/148 ,  H01L2224/16221 ,  H05K3/328 ,  H05K3/361 ,  H05K3/4046 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/4691 ,  H05K2201/10242

Abstract: A composite wiring board includes a first wiring board including a first insulating layer, a first conductor layer formed on the first insulating layer, and metal elements penetrating the first insulating layer and the first conductor layer such that the metal elements are electrically connected to each other by the first conductor layer, and a second wiring board including a second insulating layer and a second conductor layer forming on the second insulating layer and including metal connection terminals such that the metal connection terminals are corresponding to and directly bonded to the metal elements of the first wiring board, respectively.

公开(公告)号：US20170359896A1

公开(公告)日：2017-12-14

申请号：US15618256

申请日：2017-06-09

Applicant: Board of Regents, The University of Texas System

Inventor： Chi Yen Kim ,  Ryan Wicker ,  Eric MacDonald ,  David Espalin

IPC: H05K1/11 ,  H01R12/57 ,  H05K3/40 ,  H05K3/10

CPC classification number: H05K1/113 ,  H05K3/103 ,  H05K3/381 ,  H05K3/4015 ,  H05K3/4046 ,  H05K2201/0355 ,  H05K2201/10242 ,  H05K2201/10257 ,  H05K2201/1028 ,  H05K2201/10303 ,  H05K2203/0228 ,  H05K2203/0271 ,  H05K2203/1105 ,  H05K2203/1189 ,  H05K2203/1446

Abstract: A 3D printed circuit apparatus includes a 3D printed circuit having a surface layer and one or more wires embedded under the surface layer, and a conductive metal pin that is cut to a desired length and inserted into the 3D printed circuit in order to attain contact with the wire or wires embedded under the surface layer.

公开(公告)号：US20170222338A1

公开(公告)日：2017-08-03

申请号：US15399317

申请日：2017-01-05

Applicant: BIOTRONIK SE & Co. KG

Inventor： Martin Henschel

IPC: H01R11/01 ,  A61N1/375 ,  H01M2/20 ,  H01R4/02 ,  B23K26/242

CPC classification number: H01R11/01 ,  A61N1/3758 ,  B23K26/22 ,  B23K26/242 ,  B23K26/28 ,  B23K26/32 ,  B23K2101/36 ,  B23K2101/38 ,  H01M2/204 ,  H01R4/029 ,  H01R43/0221 ,  H05K1/0293 ,  H05K3/222 ,  H05K3/328 ,  H05K3/4015 ,  H05K2201/10053 ,  H05K2201/10181 ,  H05K2201/10242 ,  H05K2201/10363 ,  H05K2201/10583 ,  H05K2203/107 ,  H05K2203/173

Abstract: A battery bridge for an electronic device, preferably for an electronic implant, has an electrically conductive first contact element, an electrically conductive second contact element and an insulator. The first contact element and the second contact element comprise a weldable material. In a first state of the battery bridge, the first contact element is distanced from the second contact element via a predefined air gap and the first contact element is electrically insulated from the second contact element by the air gap and the insulator. The battery bridge is formed in such a way that it can be transferred, by welding the first contact element and the second contact element together, into a second state, in which the air gap between the first contact element and the second contact element is closed electrically conductively, at least in part. A method for activating such an electronic device is also disclosed.

公开(公告)号：US20170013725A1

公开(公告)日：2017-01-12

申请号：US15270940

申请日：2016-09-20

Applicant: Massachusetts Institute of Technology

Inventor： Dmitry Tolpin ,  James H. Kelly ,  Roger M. Maurais

IPC: H05K3/30 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K3/301 ,  H01L2224/16225 ,  H01L2924/10253 ,  H01L2924/351 ,  H01L2924/381 ,  H05K1/111 ,  H05K1/18 ,  H05K1/181 ,  H05K3/30 ,  H05K3/303 ,  H05K3/3436 ,  H05K2201/068 ,  H05K2201/094 ,  H05K2201/09418 ,  H05K2201/09427 ,  H05K2201/10242 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49133 ,  H01L2924/00

Abstract: Reliability is improved for the mechanical electrical connection formed between a grid array device, such as a pin grid array device (PGA) or a column grid array device (CGA), and a substrate such as a printed circuit board (PCB). Between adjacent PCB pads, a spacing pattern increases toward the periphery of the CGA, creating a misalignment between pads and columns. As part of the assembly method, columns align with the pads, resulting in column tilt that increases from the center to the periphery of the CGA. An advantage of this tilt is that it reduces the amount of contractions and expansions of columns during thermal cycling, thereby increasing the projected life of CGA. Another advantage of the method is that it reduces shear stress, further increasing the projected life of the CGA.

Abstract translation: 对于诸如针阵列阵列器件（PGA）或列格栅阵列器件（CGA）的栅格阵列器件和诸如印刷电路板（PCB）的衬底之间形成的机械电连接，可靠性得到改善。 在相邻的PCB焊盘之间，间隔图案朝向CGA的周边增加，导致焊盘和柱之间的未对准。 作为组装方法的一部分，列与焊盘对准，导致从CGA的中心到外围增加的列倾斜。 这种倾斜的一个优点是在热循环期间减少了柱的收缩量和膨胀量，从而增加了CGA的预计使用寿命。 该方法的另一个优点是降低了剪切应力，进一步提高了CGA的寿命。

公开(公告)号：US20150380393A1

公开(公告)日：2015-12-31

申请号：US14850339

申请日：2015-09-10

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Yoko NAKAMURA ,  Norihiro NASHIDA

IPC: H01L25/18 ,  H05K1/18 ,  H05K3/28 ,  H01L23/00

CPC classification number: H01L25/18 ,  H01L23/3107 ,  H01L23/3735 ,  H01L23/4006 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/49844 ,  H01L24/01 ,  H01L24/32 ,  H01L24/33 ,  H01L25/072 ,  H01L2224/06181 ,  H01L2224/32225 ,  H01L2224/32258 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1203 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/153 ,  H01L2924/15787 ,  H01L2924/30107 ,  H05K1/0263 ,  H05K1/144 ,  H05K1/181 ,  H05K3/284 ,  H05K2201/10022 ,  H05K2201/10166 ,  H05K2201/10242 ,  H01L2924/00

Abstract: A semiconductor device includes an insulating substrate including an insulating plate and a circuit plate disposed on a main surface of the insulating plate; a semiconductor chip having a front surface provided with an electrode and a rear surface fixed to the circuit plate; a printed circuit board facing the insulating substrate and including a metal layer; a conductive post having one end electrically and mechanically connected to the electrode and another end electrically and mechanically connected to the metal layer; a passive element fixed to the printed circuit board; and a plurality of positioning posts fixed to the printed circuit board to position the passive element.

Abstract translation: 半导体器件包括绝缘基板，绝缘基板包括绝缘板和布置在绝缘板的主表面上的电路板; 半导体芯片，具有设置有电极的前表面和固定到所述电路板的后表面; 面向绝缘基板并包括金属层的印刷电路板; 导电柱，其一端电连接和机械地连接到电极，另一端电连接和机械连接到金属层; 固定到印刷电路板的无源元件; 以及固定到印刷电路板以定位无源元件的多个定位柱。

公开(公告)号：US20150366058A1

公开(公告)日：2015-12-17

申请号：US14741174

申请日：2015-06-16

Applicant: NGK SPARK PLUG CO., LTD.

Inventor： Takuya HANDO ,  Atsuhiko SUGIMOTO

IPC: H05K1/11 ,  H05K3/40 ,  B23K1/00 ,  H05K3/36

CPC classification number: B23K1/0008 ,  H01L23/12 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/5385 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2924/00014 ,  H05K1/144 ,  H05K3/368 ,  H05K3/4015 ,  H05K2201/042 ,  H05K2201/10242 ,  H05K2201/10674 ,  H01L2224/05599

Abstract: A wiring substrate includes a first substrate to be connected to a second substrate. Electrodes are disposed on a substrate main surface of the first substrate, and columnar terminals are bonded onto the electrodes via solder portions. Each columnar terminal includes a columnar terminal body, and a projecting piece that projects from an outer peripheral surface of the columnar terminal body at a center portion, in a height direction, of the outer peripheral surface of the columnar terminal body. Each columnar terminal has a shape vertically symmetrical about the projecting piece.

Abstract translation: 布线基板包括要连接到第二基板的第一基板。 电极设置在第一基板的基板主表面上，柱状端子通过焊料部分接合到电极上。 每个柱状端子包括柱状端子主体和从柱状端子主体的外周面在柱状端子体的外周面的高度方向上的中心部突出的突出片。 每个柱状端子具有关于突出件垂直对称的形状。

公开(公告)号：US20150282327A1

公开(公告)日：2015-10-01

申请号：US14737645

申请日：2015-06-12

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yoshihito OTSUBO ,  Nobuaki OGAWA

IPC: H05K1/18 ,  H05K3/46 ,  H05K1/02

CPC classification number: H05K1/183 ,  H01L23/3121 ,  H01L25/0657 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2924/1531 ,  H01L2924/19105 ,  H05K1/0298 ,  H05K1/144 ,  H05K3/284 ,  H05K3/36 ,  H05K3/4614 ,  H05K2201/042 ,  H05K2201/10242 ,  H05K2203/0156 ,  H05K2203/1316 ,  H05K2203/1327 ,  Y10T29/49124

Abstract: The present disclosure enhances the design flexibility of a multilayer electronic device. A multilayer electronic device is formed by alternately stacking, in a top-bottom direction, substrate layers in which substrates are disposed and a component layer in which at least one component is disposed. A non-superposing region in which a substrate of a first substrate layer positioned on the upper side of a first component layer is not superposed on a substrate of a second substrate layer positioned on the lower side of the first component layer, as viewed from above, is formed in the substrate. Accordingly, within the multilayer electronic device, a space in which the substrate of the second substrate layer is not located can be formed in a region under the non-superposing region of the substrate of the first substrate layer. By using this space, the design flexibility of the multilayer electronic device can be enhanced.

Abstract translation: 本公开增强了多层电子设备的设计灵活性。 通过在上下方向交替堆叠配置有基板的基板层和配置有至少一个部件的成分层来形成多层电子器件。 位于第一成分层的上侧的第一基板层的基板不叠置在位于第一成分层的下侧的第二基板层的基板上的非重叠区域 ，形成在基板中。 因此，在多层电子器件中，可以在第一衬底层的衬底的非重叠区域下面的区域中形成其中不位于第二衬底层的衬底的空间。 通过使用该空间，可以提高多层电子装置的设计灵活性。

公开(公告)号：US20150014045A1

公开(公告)日：2015-01-15

申请号：US14306768

申请日：2014-06-17

Applicant: Massachusetts Institute of Technology

Inventor： Glenn A. Brigham ,  Richard J. Stanley ,  Bradley Thomas Perry ,  Patrick J. Bell

IPC: H05K1/02 ,  H05K3/00 ,  H05K1/11

CPC classification number: H05K3/42 ,  H05K1/0222 ,  H05K1/115 ,  H05K1/116 ,  H05K3/0094 ,  H05K3/4685 ,  H05K2201/0959 ,  H05K2201/09745 ,  H05K2201/10242 ,  H05K2203/03 ,  H05K2203/0703 ,  H05K2203/30 ,  Y10T29/49123

Abstract: A printed circuit board, and a method of fabricating the printed circuit board is disclosed. The printed circuit board includes at least one coaxial via. A hollow via is disposed in the printed circuit board. A metal sleeve is formed around the circumference of said hollow via. An inner conductive path is disposed in the hollow via. Additionally, an insulating material is disposed in the hollow via, between the conducting path and the metal sleeve. The conductive path is used to connect signal traces disposed on two different layers of the printed circuit board. In some embodiments, these signal traces carry signals having a frequency above 1 GHz, although the disclosure is not limited to this embodiment.

Abstract translation: 公开了一种印刷电路板和一种制造印刷电路板的方法。 印刷电路板包括至少一个同轴通孔。 中空通孔设置在印刷电路板中。 围绕所述中空通孔的圆周形成金属套筒。 内部导电路径设置在中空通孔中。 此外，绝缘材料设置在导电路径和金属套筒之间的中空通孔中。 导电路径用于连接布置在印刷电路板的两个不同层上的信号迹线。 在一些实施例中，这些信号迹线承载频率高于1GHz的信号，尽管本公开不限于该实施例。