中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

1428 records (took 0.031 seconds)

    LIGHT-EMITTING DIODE ARRANGEMENT AND METHOD FOR THE PRODUCTION THEREOF
    151.
    发明申请
    LIGHT-EMITTING DIODE ARRANGEMENT AND METHOD FOR THE PRODUCTION THEREOF 审中-公开
    LED和一种用于生产LED的配置

    公开(公告)号：WO2005099323A3

    公开(公告)日：2006-02-16

    申请号：PCT/EP2005003131

    申请日：2005-03-24

    Applicant: P M C PROJEKT MAN CONSULT GMBH ,  KETH ULRICH

    Inventor： KETH ULRICH

    IPC: H05K1/02 ,  F21S8/10 ,  F21V29/00 ,  H01L33/64

    CPC classification number: F21V29/70 ,  F21S43/14 ,  F21S45/47 ,  F21V29/004 ,  F21V29/74 ,  F21Y2115/10 ,  H01L33/642 ,  H05K1/0206 ,  H05K2201/0305 ,  H05K2201/10106

    Abstract: The invention relates to a light-emitting diode arrangement (1) comprising a conductor track support (2) which is provided with a electric conductor track arrangement (8, 9), and at least one light-emitting diode (3) which is electrically connected to the conductor track arrangement (8, 9). The aim of the invention is to increase the service life of light-emitting diodes having increased conductivity. According to the invention, a cooling body (6) is arranged on the side, which is opposite the light-emitting diode (3), of the conductor track support (2) and the conductor track support comprises a through opening (22) which is arranged between the light-emitting diode (3) and the cooling body (6).

    Abstract translation: 它是用（2）具有电导体排列的导体轨道载波指定（8，9）包括发光二极管器件（1），以及至少一个发光二极管（3），其被电连接到所述互连装置（8，9）。 一个想用更高的线延长LED的寿命。 为了这个目的，它提供了上侧的导体轨道载体的发光二极管（3）的相反侧（2），冷却体（6）和所述带状导体支撑件（2）的发光二极管（3）和所述冷却体（6）之间有一通孔（22） ，

    DEVICE AND METHOD FOR FORMING AND ATTACHING AN ARRAY OF CONDUCTIVE BALLS
    156.
    发明申请
    DEVICE AND METHOD FOR FORMING AND ATTACHING AN ARRAY OF CONDUCTIVE BALLS 审中-公开
    用于形成和连接导电阵列的装置和方法

    公开(公告)号：WO1996025837A1

    公开(公告)日：1996-08-22

    申请号：PCT/US1996001937

    申请日：1996-02-15

    Applicant: ROGREN, Philip, E.

    IPC: H05K03/34

    CPC classification number: B23K35/0222 ,  B23K35/0233 ,  B23K35/26 ,  H01L21/4853 ,  H05K3/3478 ,  H05K2201/0305 ,  H05K2201/10424 ,  H05K2201/10734 ,  H05K2203/043 ,  Y10T428/12361

    Abstract: A method and preform (10) for forming and attaching an array of conductive balls, preferably solder balls, to ball receiving areas (18) on a substrate is disclosed. The preform is a connected array of sub-preforms (12) comprised of the conductive material from which the balls will be formed. The connections (16) between adjacent sub-preforms (12) are designed to assure division of the preform (10) into individual masses, each sufficient to form one conductive ball. Each sub-preform (12) is provided with a bottom protrusion which assures physical and thermal contact between preform and substrate. The method involves placing the preform on the substrate such that each sub-preform is positioned above the conductive ball receiving areas. The preform and substrate are then heated to above the melting point of the conductive material to melt the conductive material and form metallurgical bonds between the conductive material and the receiving areas.

    Abstract translation: 公开了一种用于将导电球（优选焊球）阵列形成并附着到基底上的球接收区域（18）的方法和预制件（10）。 预成型件是由导电材料组成的子预成型件（12）的连接阵列，球从其形成。 相邻子预成型件（12）之间的连接（16）设计成确保预成型件（10）分成单独的质量，每个块足以形成一个导电球。 每个子预成型件（12）设置有底部突起，其确保预成型件和基板之间的物理和热接触。 该方法包括将预成型件放置在基板上，使得每个子预制件位于导电球接收区域的上方。 然后将预成型件和基底加热至高于导电材料的熔点，以熔化导电材料并在导电材料和接收区域之间形成冶金结合。

    AN ELECTRIC FUSE AND PROTECTIVE CIRCUIT
    157.
    发明申请
    AN ELECTRIC FUSE AND PROTECTIVE CIRCUIT 审中-公开
    电保险丝和保护电路

    公开(公告)号：WO1995023423A1

    公开(公告)日：1995-08-31

    申请号：PCT/SE1995000074

    申请日：1995-01-25

    Applicant: TELEFONAKTIEBOLAGET LM ERICSSON

    Inventor： TELEFONAKTIEBOLAGET LM ERICSSON ,  OLOFSSON, Lars-Anders

    IPC: H01H85/04

    CPC classification number: H01H85/048 ,  H01H85/046 ,  H05K1/0293 ,  H05K1/167 ,  H05K3/28 ,  H05K2201/0305 ,  H05K2201/09909 ,  H05K2201/10181

    Abstract: The present invention relates to an electric protective circuit comprising an electric fuse, including a solder (3), and an electric resistance loop (10) connected in series with the fuse (1), the fuse and loop being mounted on a substrate (11). The solder (3) will melt at elevated temperatures caused by heating of the substrate (11), and is surrounded by a material (8) which protects the solder (3) against the oxidizing effect of the surrounding air, and is applied in a region (9) surrounding the solder (3) and delimited by barrier walls (7), therewith enabling the solder (3) to contract onto the connecting terminals (4a, 4b) when it melts, therewith breaking the current path. The material (8) is temperature-stable in a solid state at normal fuse operating temperatures. The resistance loop (10) includes current-conducting paths (12) mutually connected with bridging elements (13), whose electrical resistance is much lower than the electrical resistance of the current-conducting paths (12), and trimming elements (14) for adjusting the resistance of the loop.

    Abstract translation: 本发明涉及一种电保护电路，其包括电熔丝，包括焊料（3）和与熔丝（1）串联连接的电阻环（10），所述熔丝和环安装在基板（11）上 ）。 焊料（3）将在基板（11）的加热引起的高温下熔化，并被保护焊料（3）的材料（8）所围绕，以抵抗周围空气的氧化作用， 围绕焊料（3）并由阻挡壁（7）限定的区域（9），从而使焊料（3）在其熔化时收缩到连接端子（4a，4b）上，从而断开电流路径。 材料（8）在正常保险丝工作温度下处于固态温度稳定。 电阻回路（10）包括与桥接元件（13）相互连接的电流传导路径（12），其电阻远低于导电通路（12）的电阻，并且修整元件（14）用于 调整回路的阻力。

    METHOD OF MAKING HIGH DENSITY INTERCONNECTION SUBSTRATES USING STACKED MODULES AND SUBSTRATES OBTAINED
    160.
    发明申请
    METHOD OF MAKING HIGH DENSITY INTERCONNECTION SUBSTRATES USING STACKED MODULES AND SUBSTRATES OBTAINED 审中-公开
    使用堆叠模块和基板制作高密度互连基板的方法

    公开(公告)号：WO1988001469A1

    公开(公告)日：1988-02-25

    申请号：PCT/US1987001549

    申请日：1987-06-30

    Applicant: DIGITAL EQUIPMENT CORPORATION

    Inventor： DIGITAL EQUIPMENT CORPORATION ,  SANKAR, N., Gowri ,  CZEREPAK, Stanley

    IPC: H05K03/46

    CPC classification number: H05K3/4629 ,  H05K1/0272 ,  H05K1/0306 ,  H05K1/113 ,  H05K3/388 ,  H05K3/40 ,  H05K3/4038 ,  H05K3/4053 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4647 ,  H05K2201/0305

    Abstract: In order to provide for interconnection of a plurality of electronic components, thin sheets (20, 21) of an appropriate dielectric material have holes (22) drilled therethrough. The holes (22) are then filled with a conducting material (23) and the surfaces of the substrates (24) are lapped to insure smoothness. A conducting pattern (25, 26) (i.e. of conducting traces) is formed on the surfaces of the dielectric sheets. Conducting regions are also formed on the dielectric sheet surfaces. A first sheet (21) of dielectric material has conducting dots (27) applied to the conducting regions on a first surface. A second sheet (20) of dielectric material is aligned with the first sheet so that conducting regions of a second surface of the second dielectric sheet (20) can be coupled to the conducting dots (27). The structure is processed so that the conducting dots (27) cause the two dielectric sheets (20, 21) to be joined both physically and electrically at the conducting regions. By appropriate arrangement of the conducting regions, conducting traces (26) on adjacent surfaces of adjoining dielectric sheets (20, 21) and conducting traces (26) on opposite surfaces of a dielectric sheet (20, 21) can be coupled to provided appropriate interconnection of electronic components.

    Abstract translation: 为了提供多个电子部件的互连，适当介电材料的薄片（20,21）具有穿过其中的孔（22）。 然后用导电材料（23）填充孔（22），并且研磨衬底（24）的表面以确保平滑度。 在电介质片的表面上形成导电图案（25,26）（即导电迹线）。 电介质片表面也形成导电区域。 介电材料的第一片（21）具有施加到第一表面上的导电区的导电点（27）。 介电材料的第二片材（20）与第一片材对准，使得第二电介质片材（20）的第二表面的导电区域可以连接到导电点（27）。 处理该结构使得导电点（27）使两个电介质片（20,21）在导电区域物理和电连接。 通过适当地布置导电区域，在电介质片（20,21）的相对表面上的相邻电介质片（20,21）的相邻表面上的导电迹线（26）和导电迹线（26）可被联接以提供适当的互连 的电子元件。

Patent Agency Ranking