公开(公告)号：WO2004034756A2

公开(公告)日：2004-04-22

申请号：PCT/DK2003/000630

申请日：2003-09-25

Applicant: OTICON A/S ,  MEHR, Ulrik ,  JOHANSEN, Jesper, B.

Inventor： MEHR, Ulrik ,  JOHANSEN, Jesper, B.

IPC: H05K1/00

CPC classification number: A61N1/16 ,  A61N1/04 ,  H05K1/0228 ,  H05K1/0245 ,  H05K1/0393 ,  H05K2201/097

Abstract: Layered structure for a head worn device, wherein electric signals are fed along metallic leads, which are adhered to a layer on or within the layered structure and where a first and a second lead for connecting a first and a second terminal of a component are provided and whereby the two leads are passed side by side and alternating on the two sides of the layer, and in such a manner that the first and second lead will cross one another at an angle but passing on each their side of the print layer.

Abstract translation: 用于头部磨损装置的分层结构，其中电信号沿着金属引线馈送，所述金属引线粘附到层状结构上或其内的层，并且其中提供用于连接部件的第一和第二端子的第一和第二引线 并且由此两个引线在层的两侧并排地交替并且以这样的方式使得第一和第二引线将以一定角度彼此交叉，而是穿过印刷层的每一侧。

公开(公告)号：WO2003007338A2

公开(公告)日：2003-01-23

申请号：PCT/US2002/022025

申请日：2002-07-12

Applicant: LEJE LLC

Inventor： GREGORY, John

IPC: H01L

CPC classification number: H01L23/50 ,  H01L21/486 ,  H01L21/4867 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/112 ,  H05K3/3436 ,  H05K3/3457 ,  H05K3/3484 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/097 ,  H05K2203/0278 ,  H05K2203/043 ,  Y10T29/49144 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A method for attaching an electronic component to a substrate having a patterned conductive layer underlying a dielectric layer includes : removing regions of the dielectric layer to form cavities having an exposed surface area of the conductive layer ; filling the cavities with solder paste ; heating the solder paste to form a convex surface which protrudes above the substrate surface, for receiving an electronic component for attachment ; planarising the convex surface such that it and the surface of the substrate surface are substantially coplanar ; placing contact pads of the electronic component adjacent the substrate such that the contact pads overlie given filled cavities ; and reheating the solder so that it reflows and connects the electronic component to the substrate. The cavities preferably all have the same volume. If the ratio of exposed surface area to cavity volume is low, pillars form during reflow, spacing the component from the substrate.

Abstract translation: 将电子部件附着到具有在电介质层下方的图案化导电层的基板的方法包括：去除电介质层的区域以形成具有导电层的暴露表面积的空腔; 用焊膏填充空腔; 加热焊膏以形成在基板表面上方突出的凸表面，用于接收用于附接的电子部件; 使凸面平坦化，使其与基板表面的表面基本上共面; 将电子部件的接触垫放置在衬底附近，使得接触垫覆盖给定的填充空腔; 并重新加热焊料，使其回流并将电子部件连接到基板。 腔优选全部具有相同的体积。 如果暴露的表面积与空腔体积的比率低，则在回流期间形成柱，从而将组分与衬底间隔开。

公开(公告)号：WO02025797A2

公开(公告)日：2002-03-28

申请号：PCT/US2001/029738

申请日：2001-09-24

IPC: H01F41/00 ,  H01F17/00 ,  H01F17/04 ,  H01F30/00 ,  H01F37/00 ,  H01F41/04 ,  H05K1/16 ,  H05K3/06 ,  H05K3/42 ,  H05K3/46 ,  H02M

CPC classification number: H01F41/046 ,  H01F17/0033 ,  H05K1/165 ,  H05K3/06 ,  H05K3/429 ,  H05K3/4611 ,  H05K2201/086 ,  H05K2201/09063 ,  H05K2201/097 ,  H05K2201/10416 ,  Y10S29/016 ,  Y10T29/4902 ,  Y10T29/49073 ,  Y10T29/49075 ,  Y10T29/49165

Abstract: The present invention relates to the methods of construction for inductive components of, preferably, ferromagnetic materials such as inductors, chokes, and transformers when used as an integral part of the fabrication of PCB's or FLEX's. In one preferred embodiment, holes are formed through a ferromagnetic substrate and plated with conductive material. The arrangement of these holes, and the subsequent design that ensues, will form the inductive components within the plane of the media in which the device is formed; using the substrate for a magnetic core. By using this approach, the inductive components can be miniaturized to physical sizes compatible with the requirements of modern surface mount technology (SMT) for integrated circuitry (IC). This process also allows these components to be fabricated using mass production techniques, thereby avoiding the need to handle discrete devices during the manufacturing process. In another preferred embodiment, a series of thin, concentric high permeability rings are etched on a substrate to provide high permeability transformers and inductors having minimal eddy current effects.

Abstract translation: 本发明涉及当用作PCB或FLEX的制造的组成部分时，优选地，铁磁材料如电感器，扼流器和变压器的电感元件的构造方法。 在一个优选实施例中，孔通过铁磁基底形成并且镀有导电材料。 这些孔的布置以及随之而来的设计将在其中形成装置的介质的平面内形成感应部件; 使用用于磁芯的基板。 通过使用这种方法，电感元件可以小型化为与集成电路（IC）的现代表面贴装技术（SMT）的要求兼容的物理尺寸。 该过程还允许使用大量生产技术来制造这些部件，从而避免了在制造过程中处理分立器件的需要。 在另一个优选实施例中，在衬底上蚀刻一系列薄的，同心的高磁导率环，以提供具有最小涡流效应的高磁导率变压器和电感器。

公开(公告)号：WO01058229A1

公开(公告)日：2001-08-09

申请号：PCT/JP2001/000778

申请日：2001-02-02

IPC: H01G4/33 ,  H05K1/11 ,  H05K1/16 ,  H05K3/46

CPC classification number: H05K1/115 ,  H05K1/113 ,  H05K1/162 ,  H05K3/4611 ,  H05K2201/0959 ,  H05K2201/09609 ,  H05K2201/097 ,  H05K2201/09827

Abstract: A capacitor structure of a wiring board having large capacitance per unit area is disclosed. A first pattern (3) is formed on the upper side of an insulator layer (2), and a second pattern (4) is formed on the lower side. In the insulator layer (2), first vias (5) and second vias (6) are formed, and the wall surfaces of the first vias (5) and the second vias (6) are plated. The first pattern (3) with first vias are lands while the second pattern (4) with first vias are blanks. The second pattern (4) with second vias (6) lands while the first pattern (3) with second vias (6) blank.

Abstract translation: 公开了具有每单位面积的大电容的布线基板的电容器结构。 第一图案（3）形成在绝缘体层（2）的上侧，并且在下侧形成第二图案（4）。 在绝缘体层（2）中，形成第一通孔（5）和第二通孔（6），并且第一通孔（5）和第二通孔（6）的壁表面被电镀。 具有第一通孔的第一图案（3）是平台，而具有第一通孔的第二图案（4）是空格。 具有第二通路（6）的第二图案（4）着陆，而具有第二通孔（6）的第一图案（3）为空白。

公开(公告)号：WO00054337A1

公开(公告)日：2000-09-14

申请号：PCT/US1999/028626

申请日：1999-12-02

IPC: H01L23/12 ,  H01L23/538 ,  H01L23/66 ,  H01L25/00 ,  H01L25/16 ,  H01L27/06 ,  H01L27/08 ,  H05K1/16 ,  H05K3/46 ,  H01L29/00 ,  H01L23/48 ,  H01L23/52

CPC classification number: H01L23/5383 ,  H01L23/5386 ,  H01L23/66 ,  H01L25/16 ,  H01L27/0641 ,  H01L27/08 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/4611 ,  H05K3/4644 ,  H05K2201/09263 ,  H05K2201/09672 ,  H05K2201/097 ,  H05K2201/10674

Abstract: In an IC packaging scheme, a multilayer substrate (114) is composed of electrically conductive layers of interconnects (120, 122, 124), separated by insulative layers of epoxy resin or ceramic and connected by vias. Passive elements (102, 104, 106) are integrated within the substrate (114) at the definition stage during layout of the interconnects (120, 122, 124). The passives (102, 104, 106) can be used to enhance the electrical performance of the active circuit die to a maximum extent allowed by the material technology used for the substrate. Material selection for the package is made to allow for the best passive integration for a given circuit design. Typical applications include power supply bypass capacitors, radio frequency tuning, and impedance matching. The incorporation of passives in the packaging substrate creates a new class of electrically tailorable packaging that can derive improved performance for any given die design over existing approaches.

Abstract translation: 在IC封装方案中，多层衬底（114）由互连（120,122,124）的导电层组成，由绝缘层的环氧树脂或陶瓷隔离，并通过通孔连接。 无源元件（102,104,106）在互连（120,122,124）的布局期间在定义阶段集成在衬底（114）内。 无源部件（102,104,106）可用于在用于衬底的材料技术允许的最大程度上增强有源电路管芯的电气性能。 封装的材料选择是为给定的电路设计提供了最佳的无源集成。 典型应用包括电源旁路电容，射频调谐和阻抗匹配。 无源器件在封装衬底中的并入产生了一类新的可电气封装，可以针对现有方法，为任何给定的管芯设计提供改进的性能。

公开(公告)号：WO1989004587A1

公开(公告)日：1989-05-18

申请号：PCT/DE1988000685

申请日：1988-11-05

Applicant: SYSTEM KONTAKT GESELLSCHAFT FÜR ELEKTRONISCHE ... ,  LEITL, Franz

Inventor： SYSTEM KONTAKT GESELLSCHAFT FÜR ELEKTRONISCHE ...

IPC: H05K01/14

CPC classification number: H05K1/0228 ,  H05K1/0219 ,  H05K1/0245 ,  H05K9/0039 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/097

Abstract: A computer bus comprises conductive tracks which extend in four layers. Each plug-in point (I, II, III) has three columns (a, b, c) of plug-in holes arranged in a plurality of rows (1, 2, 3, ...). The conductive track which links the plug-in holes having the index a2 in sequence passes between the plug-in points I and II through the first layer, but between the points II and III through the fourth layer. The same principle applies to the conductive track which connects plug-in holes diagonally adjacent to the plug-in holes a2 or the second holes thereafter. The conductive tracks which connect the adjacent holes to the plug-in holes a2 pass through the fourth layer when the conductive track connecting the plug-in holes a2 in sequence passes through the first layer, and vice-versa. This ensures that the conductive tracks starting from neighbouring holes are situated a maximum distance apart. The adjacent conductive tracks which pass through the same layer lead to non-adjacent plug-in holes, which results in minimal signal coupling. In addition, the alternation between the layers leaves sufficient space in each layer for a protective grid, which further improves the decoupling and shielding of the signals transmitted by the bus. Since the alternation of the conducting tracks between the layers is carried out according to the same principle, all the conducting trucks have the same length. This enables signals with identical transmission times to be obtained. A series inductance is also provided for each transverse capacitor in such a way that signals of different frequencies travel at the same speed.

公开(公告)号：EP2566307A3

公开(公告)日：2017-11-15

申请号：EP12005825.0

申请日：2012-08-10

Applicant: Eppendorf AG

Inventor： Reichmuth, Burkardt

IPC: H05K1/02 ,  B01L3/02 ,  G01F11/02 ,  H05K1/03 ,  G01N35/10

CPC classification number: H05K1/0296 ,  B01L3/0227 ,  B01L2200/087 ,  B01L2200/12 ,  G01F11/021 ,  G01N35/1002 ,  H05K1/0393 ,  H05K2201/053 ,  H05K2201/09027 ,  H05K2201/09063 ,  H05K2201/09236 ,  H05K2201/09254 ,  H05K2201/0939 ,  H05K2201/09672 ,  H05K2201/097 ,  H05K2201/09972 ,  H05K2201/10151

Abstract: The invention relates to a laboratory sample instrument (200) with a cable holding space (185) in which a printed circuit board cable device (100) is arranged, more particularly to a dispenser or a pipette. The printed circuit board cable device has at least one printed circuit board (102), which has a first and a second side of the board, and, arranged in succession, at least one first printed circuit board section (A), at least one second printed circuit board section (B) and at least one third printed circuit board section (C), with the printed circuit board having a number of conductor tracks (121,122) which, at least in sections, are arranged parallel with respect to one another on the printed circuit board and extend from a first track section, which is arranged in the first printed circuit board section, via the second printed circuit board section to the third printed circuit board section, in which a second track section is arranged, wherein, in the second printed circuit board section, at least one conductor track (121a, 122a) is arranged on the first side of the board and at least one conductor track (121b, 122b) is arranged on the second side of the board.

Abstract translation: 本发明涉及一种具有电缆保持空间（185）的实验室样本器械（200），其中布置有印刷电路板电缆装置（100），更具体地涉及分配器或移液管。 所述印刷电路板电缆装置具有至少一个印刷电路板（102），所述印刷电路板具有所述电路板的第一侧和第二侧，并且依次布置至少一个第一印刷电路板部分（A），至少一个 第二印刷电路板部分（B）和至少一个第三印刷电路板部分（C），其中所述印刷电路板具有多个印刷电路板（121,122），所述印刷电路板至少部分地相对于彼此平行地布置 在印刷电路板上并且从布置在第一印刷电路板部分中的第一轨道部分经由第二印刷电路板部分延伸到布置有第二轨道部分的第三印刷电路板部分，其中， 在第二印刷电路板部分中，至少一个印制导线（121a，122a）布置在板的第一侧上，并且至少一个印制导线（121b，122b）布置在板的第二侧上。

公开(公告)号：EP1384320B1

公开(公告)日：2015-03-04

申请号：EP02731648.8

申请日：2002-05-02

Applicant: Thomson Licensing

Inventor： CROMARTY, Brian, Jonathan ,  COAN, Lawrence, Charles ,  HALL, Edward, Allen

IPC: H03H1/00

CPC classification number: H05K9/0066 ,  H05K1/0218 ,  H05K1/0228 ,  H05K1/0233 ,  H05K2201/097 ,  H05K2201/1006 ,  H05K2201/10189 ,  H05K2201/10371

公开(公告)号：EP2068391A2

公开(公告)日：2009-06-10

申请号：EP08018960.8

申请日：2008-10-30

Applicant: Rohde & Schwarz GmbH & Co. KG

Inventor： Katzer, Michael ,  Reichel, Thomas ,  Peschke, Martin

IPC: H01P3/02

CPC classification number: H01P3/02 ,  H05K1/0228 ,  H05K1/0245 ,  H05K2201/09245 ,  H05K2201/097

Abstract: Zur Übertragung von elektrischen Signalen wird eine Einrichtung mit einem Substrat (95) und zumindest zwei Streifenleitungen (96, 97) eingesetzt. Die zumindest zwei Streifenleitungen (96, 97) sind dabei an oder in dem Substrat (95) angebracht und weisen mehrere Überkreuzungen auf. Die Überkreuzungen sind in festgelegten Abständen über die Länge der Streifenleitungen (96, 97) verteilt.

Abstract translation: 用于传送电信号的装置包括具有分布在带状线长度上的若干交叉点的带状线（96,97,110,111）。 优选特征：带状线被布置在基底（95）的不同侧面或不同层中的部分中。 交叉点由通过基板的通孔（99）形成。

公开(公告)号：EP1753274A3

公开(公告)日：2009-01-14

申请号：EP06300871.8

申请日：2006-08-09

Applicant: Alcatel Lucent

Inventor： Brown, Paul James

IPC: H05K1/11 ,  H01L23/498

CPC classification number: H05K1/114 ,  H01L21/50 ,  H01L23/49816 ,  H01L2924/0002 ,  H05K3/429 ,  H05K2201/09227 ,  H05K2201/09509 ,  H05K2201/097 ,  H05K2201/10734 ,  H01L2924/00

Abstract: A printed circuit board (PCB) assembly having a plurality of circuit layers including outer layers and intervening layers with through-vias (12') and micro-vias (MV) used to translate a portion of the signal connections of the grid, thereby creating a set of diagonal routing channels between the vias on internal layers of the board and a BGA package mounted on the printed circuit board.