Abstract:
An electronic device includes a multilayer circuit board having a non-planar three-dimensional shape defining a membrane switch recess therein. The multilayer circuit board may include at least one liquid crystal polymer (LCP) layer, and at least one electrically conductive pattern layer thereon defining at least one membrane switch electrode adjacent the membrane switch recess to define a membrane switch. The electronic may further include a compressible dielectric material filling the membrane switch recess. The electronic device may also include at least one spring member within the membrane switch recess.
Abstract:
The invention relates to a circuit board having a light source for illumination purposes, having at least one LED electrically conductively connected to conductors of the circuit board, and the light thereof being converted into directed light by means of at least one mirror disposed on the circuit board, characterized in that the mirror is designed as a reflective coating printed onto the circuit board.
Abstract:
A patch panel (100) for use with infrastructure management systems that utilizes a plurality of cables interconnected to end-user devices and work area outlets, and integrated circuits to monitor the status of these end-user devices and outlets includes a pair of circuit boards. A plurality of connective jacks (31) are mounted on the first (36) of the two circuit boards, and are interconnected to other network devices. Wires from the jacks extend to and connect with network devices and the first circuit board has a plurality of first integrated circuits (45) mounted thereon which monitor the status of the network devices connected to the jacks. The second circuit board (49) is spaced apart from the first circuit board and it includes a plurality of second integrated circuits (52) that convey the status information obtained from the network work area outlets on the network to network devices, such as switches and scanners of the network (104).
Abstract:
An electrical connection structure allowing reduction in height and easy disassembly, wherein a first connecting member comprises a flexible substrate comprising a flexible insulating film, at least one conductive pad formed on at least one side thereof, a conductive circuit pattern extending from the rim of the pad, a through-hole formed through the thickness thereof at a planar position within the pad, and a small aperture formed at a planar position within the pad and communicating with the through-hole, and a second connecting member comprises a conductive projection formed at least one side thereof and electrically connected with a conductive circuit pattern formed inside or on the second connecting member, where the electrical connection is formed in the manner such that the conductive projection is inserted in the through-hole, through the small aperture, and mechanically contacts the pad.
Abstract:
The invention relates to an electronic, in particular microelectronic, functional group and to a method for its production. The method according to the invention includes the following steps: a) coating of a mount (5a) with a non-conductive adhesive (4a); b) application of a conductor structure (3) to a subarea of the adhesive layer (4a); c) arrangement of an electronic component (1) with at least one external electrical connecting contact (2) on the adhesive layer (4a) and on the conductor structure (3), with the at least one connecting contact (2) of the electronic component (1) being brought directly into contact with the conductor structure (3), and with a part of the outer casing of the component (1) being brought directly into contact with the adhesive layer (4a). The method according to the invention allows electronic, in particular microelectronic, functional groups to be produced with care, quickly and in particular at low cost.
Abstract:
A method is for making a non-planar three-dimensional (3D) multilayered circuit board. The method may include forming a stacked arrangement including at least one pair of liquid crystal polymer (LCP) layers with a bonding layer therebetween. The stacked arrangement may further include at least one electrically conductive pattern layer on at least one of the LCP layers. The method may further include heating and applying pressure to the stacked arrangement to shape the stacked arrangement into a non-planar 3D shape and concurrently causing the bonding layer to bond together the adjacent LCP layers of the stacked arrangement to thereby form the non-planar 3D multi-layered circuit board.