公开(公告)号：US07629559B2

公开(公告)日：2009-12-08

申请号：US11305073

申请日：2005-12-19

Applicant: Subahu D. Desai ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich ,  Ronald V. Smith

Inventor： Subahu D. Desai ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich ,  Ronald V. Smith

IPC: H05B1/02

CPC classification number: H05K3/4069 ,  H05K1/0293 ,  H05K3/105 ,  H05K2201/096 ,  H05K2203/105

Abstract: A method of improving conductive paste connections in a circuitized substrate in which at least one and preferably a series of high voltage pulses are applied across the paste and at least one and preferably a series of high current pulses are applied, both series of pulses applied separately. The result is an increase in the number of conductive paths through the paste connections from those present prior to the pulse applications and a corresponding resistance reduction in said connections.

Abstract translation: 一种改进电路化基板中的导电糊料连接的方法，其中施加至少一个并且优选一系列高压脉冲施加在该糊料上并且至少一个并且优选地一系列高电流脉冲，两个脉冲串分别施加 。 结果是通过粘合连接的导电路径的数量从在脉冲应用之前存在的导电路径的数量增加以及所述连接中相应的电阻减小。

公开(公告)号：US07541058B2

公开(公告)日：2009-06-02

申请号：US11907006

申请日：2007-10-09

Applicant: Benson Chan ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  Mark D. Poliks

Inventor： Benson Chan ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  Mark D. Poliks

IPC: G02B6/02 ,  H01L21/00 ,  G03G15/00 ,  G02B6/12

CPC classification number: G02B6/1221 ,  G02B6/132 ,  G02B6/136 ,  G02B6/4214 ,  G02B6/4246 ,  H05K1/0274

Abstract: A circuitized substrate (e.g., PCB) including an internal optical pathway as part thereof such that the substrate is capable of transmitting and/or receiving both electrical and optical signals. The substrate includes an angular reflector on one of the cladding layers such that optical signals passing through the optical core will impinge on the angled reflecting surfaces of the angular reflector and be reflected up through an opening (including one with optically transparent material therein), e.g., to a second circuitized substrate also having at least one internal optical pathway as part thereof, to thus interconnect the two substrates optically. A method of making the substrate is also provided.

公开(公告)号：US07441709B2

公开(公告)日：2008-10-28

申请号：US11086324

申请日：2005-03-23

Applicant: Benson Chan ,  How T. Lin ,  Voya R. Markovich ,  Ronald V. Smith

Inventor： Benson Chan ,  How T. Lin ,  Voya R. Markovich ,  Ronald V. Smith

IPC: G06K19/06

CPC classification number: G06K19/005 ,  G06K7/084 ,  G06K17/00 ,  G06K19/07354 ,  G06K2017/0064

Abstract: An electronic card assembly is provided which includes a protective housing having a movable card therein. The card, in one example one having a magnetic stripe, has its information erased when being inserted into the housing and re-written back onto its information portion (magnetic stripe) during card withdrawal, provided appropriate human information (e.g., from a fingerprint) is received by the assembly's reader component.

Abstract translation: 提供一种电子卡组件，其包括其中具有可移动卡的保护壳体。 在一个示例中具有磁条的卡在卡插入时被插入到壳体中被擦除并且在卡退出期间被重新写回到其信息部分（磁条）上，提供适当的人类信息（例如，从指纹） 被大会的阅读器组件接收。

公开(公告)号：US07152319B2

公开(公告)日：2006-12-26

申请号：US10811817

申请日：2004-03-30

Applicant: Benson Chan ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich ,  David L. Thomas

Inventor： Benson Chan ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich ,  David L. Thomas

IPC: H01K3/10

CPC classification number: H05K3/4688 ,  H01L23/3128 ,  H01L23/5383 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/024 ,  H05K1/113 ,  H05K3/4623 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/061 ,  Y10T29/49126 ,  Y10T29/49165 ,  H01L2224/0401

Abstract: A multilayered PCB including two multilayered portions, one of these able to electrically connect electronic components mounted on the PCB to assure high frequency connections therebetween. The PCB further includes a conventional PCB portion to reduce costs while assuring a structure having a satisfactory overall thickness for use in the PCB field. Coupling is also possible to the internal portion from these components. Methods of making these structures have also been provided.

Abstract translation: 包括两个多层部分的多层PCB，其中之一能够电连接安装在PCB上的电子部件，以确保其间的高频连接。 PCB还包括常规PCB部分以降低成本，同时确保具有令人满意的整体厚度的结构以用于PCB领域。 这些组件的内部部分也可以进行耦合。 也提供了制造这些结构的方法。

公开(公告)号：US07108809B2

公开(公告)日：2006-09-19

申请号：US10262754

申请日：2002-10-01

Applicant: Benson Chan ,  Richard R. Hall ,  How T. Lin ,  Christopher J. Majka ,  John H. Sherman

Inventor： Benson Chan ,  Richard R. Hall ,  How T. Lin ,  Christopher J. Majka ,  John H. Sherman

IPC: B29D11/00

CPC classification number: B29D11/00 ,  B29C33/42

Abstract: An optical coupler arrangement which is employed for replicating surface features of diverse types of optical devices. Also disclosed is to a novel method of accurately replicating surface features of optical devices; particularly through the utilization of the novel optical coupler arrangement.

Abstract translation: 用于复制各种类型的光学器件的表面特征的光耦合器装置。 还公开了一种准确地复制光学器件的表面特征的新颖方法; 特别是通过利用新颖的光耦合装置。

公开(公告)号：US20120260063A1

公开(公告)日：2012-10-11

申请号：US13082599

申请日：2011-04-08

Applicant: Voya R. Markovich ,  How T. Lin ,  Benson Chan ,  Frank D. Egitto

Inventor： Voya R. Markovich ,  How T. Lin ,  Benson Chan ,  Frank D. Egitto

IPC: G06F15/76 ,  G06F9/02

CPC classification number: H05K3/365 ,  H01L2924/0002 ,  H05K1/148 ,  H05K2201/047 ,  H05K2201/10159 ,  H05K2201/209 ,  H01L2924/00

Abstract: A detachable, logic leaf module having dendritic projections on a surface is connected to a recessed area on the surface of a cluster interface board. The projections are used for electrically connecting the logic module device to the cluster interface board or the like, the projections on the surface of the logic leaf being flexibly and conductively wired to the receiving area on the surface of the cluster interface board. The logic leaf connector is removable without the need for solder softening thermal cycles or special tools, and permits the simple removal or replacement of an individual leaf at any time.

Abstract translation: 在表面上具有树状突起的可拆卸的逻辑叶片模块连接到集群接口板的表面上的凹陷区域。 突起用于将逻辑模块设备电连接到集群接口板等，逻辑叶片的表面上的突起被灵活地和导电地连接到集群接口板的表面上的接收区域。 逻辑叶片连接器是可移动的，不需要焊料软化热循环或特殊工具，并且允许在任何时间简单地移除或更换单个叶片。

公开(公告)号：US08240031B2

公开(公告)日：2012-08-14

申请号：US12837640

申请日：2010-07-16

Applicant: Voya R. Markovich ,  Ronald V. Smith ,  How T. Lin ,  Frank D. Egitto ,  Rabindra N. Das ,  William E. Wilson ,  Rajinder S. Rai

Inventor： Voya R. Markovich ,  Ronald V. Smith ,  How T. Lin ,  Frank D. Egitto ,  Rabindra N. Das ,  William E. Wilson ,  Rajinder S. Rai

IPC: H05K3/30

CPC classification number: H05K3/3436 ,  H05K1/111 ,  H05K2201/10378 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/4919

Abstract: A flexible, high density decal and the use thereof methods of forming detachable electrical interconnections between a flexible chip carrier and a printed wiring board. The flexible decal has fine-pitch pads on a first surface and pads of a pitch wider than the fine pitch on a second surface, the fine-pitch pads on the first surface designed to electrically connect to a semiconductor device, and the wider-pitch pads on the second surface designed to electrically connect to a printed wiring board or the like. The pads on the first surface are conductively wired to the pads on the second surface through one or more insulating levels in the flexible decal.

Abstract translation: 柔性，高密度贴花及其在柔性芯片载体和印刷线路板之间形成可拆卸电互连的方法。 柔性贴花在第一表面上具有细间距焊盘，并且在第二表面上具有比微细间距更宽的间距的焊盘，设计成电连接到半导体器件的第一表面上的细间距焊盘和较宽间距 第二表面上的焊盘被设计成电连接到印刷线路板等。 第一表面上的焊盘通过柔性贴花中的一个或多个绝缘水平导电地连接到第二表面上的焊盘。

公开(公告)号：US20090109624A1

公开(公告)日：2009-04-30

申请号：US11976468

申请日：2007-10-25

Applicant: Benson Chan ,  Frank D. Egitto ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  David L. Thomas

Inventor： Benson Chan ,  Frank D. Egitto ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  David L. Thomas

IPC: H05K7/20 ,  H05K3/20

CPC classification number: H05K1/0206 ,  H01L2924/0002 ,  H05K1/0272 ,  H05K3/0061 ,  H05K3/44 ,  H05K2201/064 ,  H05K2201/09745 ,  H05K2201/10674 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T428/24917 ,  H01L2924/00

Abstract: An electrical assembly which includes a circuitized substrate including a first plurality of dielectric and electrically conductive circuit layers alternatively oriented in a stacked orientation, a thermal cooling structure bonded to one of the dielectric layers and at least one electrical component mounted on the circuitized substrate. The circuitized substrate includes a plurality of electrically conductive and thermally conductive thru-holes located therein, selected ones of the thermally conductive thru-holes thermally coupled to the electrical component(s) and extending through the first plurality of dielectric and electrically conductive circuit layers and being thermally coupled to the thermal cooling structure, each of these selected ones of thermally conductive thru-holes providing a thermal path from the electrical component to the thermal cooling structure during assembly operation. The thermal cooling structure is adapted for having cooling fluid pass there-through during operation of the assembly. A method of making the substrate is also provided.

Abstract translation: 一种电气组件，其包括电路化衬底，其包括以层叠取向交替取向的第一多个电介质和导电电路层，结合到所述电介质层之一的热冷结构和安装在所述电路化衬底上的至少一个电气部件。 电路化衬底包括位于其中的多个导电和导热通孔，选择的导热通孔热耦合到电气部件并延伸穿过第一多个电介质和导电电路层，并且 热耦合到热冷却结构，这些选择的导热通孔中的每一个在组装操作期间提供从电气部件到热冷却结构的热路径。 热冷却结构适于在组件的操作期间使冷却流体通过。 还提供了制造基板的方法。

公开(公告)号：US07511518B2

公开(公告)日：2009-03-31

申请号：US11902976

申请日：2007-09-27

Applicant: Frank D. Egitto ,  How T. Lin

Inventor： Frank D. Egitto ,  How T. Lin

IPC: G01R31/02

CPC classification number: H05K3/4007 ,  G01R1/06711 ,  G01R1/0735 ,  H05K1/0393 ,  H05K3/365 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09627 ,  H05K2201/09745 ,  H05K2201/10378

Abstract: A method of making an interposer in which at least two dielectric layers are bonded to each other to sandwich a plurality of conductors there-between. The conductors each electrically couple a respective pair of opposed electrical contacts which are formed within and protrude from openings which are also formed within the dielectric layers as part of this method. The resulting interposer is ideally suited for use as part of a test apparatus to interconnect highly dense patterns of solder ball contacts of a semiconductor chip to lesser dense arrays of contacts on the apparatus's printed circuit board.

Abstract translation: 一种制造其中至少两个电介质层彼此结合以夹在其间的多个导体的插入件的方法。 这些导体各自电耦合相应的一对相对的电触点，其形成在也作为该方法的一部分的电介质层内形成的开口内并从其中突出。 所得到的内插器非常适合用作测试装置的一部分，以将半导体芯片的高密度图案的焊球接触件与装置的印刷电路板上的较小致密的触点阵列相互连接。

公开(公告)号：US07449381B2

公开(公告)日：2008-11-11

申请号：US11352279

申请日：2006-02-13

Applicant: Rabindra N. Das ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

Inventor： Rabindra N. Das ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

IPC: H01L21/8234 ,  H01L21/00

CPC classification number: H05K1/162 ,  H05K1/113 ,  H05K3/0023 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2203/013 ,  H05K2203/0568

Abstract: A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.

Abstract translation: 一种形成电容衬底的方法，其中材料的至少一个电容介电层被屏幕或喷墨印刷到导体上，然后进一步处理衬底，包括添加通孔以将所选择的元件耦合到衬底内以形成 至少两个电容器作为衬底的内部元件。 电容性衬底可以结合在更大的电路化衬底内，例如以形成电组件。 还提供了一种制造包括这种基板的信息处理系统的方法。