公开(公告)号：JP2003059902A

公开(公告)日：2003-02-28

申请号：JP2002214012

申请日：2002-07-23

Applicant: United Microelectronics Corp ,  聯華電子股▲分▼有限公司

Inventor： WU YANN-PYNG ,  HO YUEH-FENG ,  SUN GOW-WEI ,  HUNG JEN-KU

IPC: H01L21/3065 ,  H01L21/311

CPC classification number: H01L21/31138 ,  H01L21/31116

Abstract: PROBLEM TO BE SOLVED: To provide a method for precleaning a polymer debris to be removed by softening and burning the debris.
SOLUTION: In the method for precleaning a polymer debris, etching treatment using a perfluocarbon gas is carried out and then a specific gas mixture is provided. Next, a plasma generated from the gas mixture is used to preclean a polymer debris. The specific gas mixture is selected from the group of a gas mixture of oxygen and nitrogen, a gas mixture of hydrogen and argon, a gas mixture of argon and nitrogen, and a gas mixture of oxygen and argon. The plasma generated from the gas mixture can perfectly remove the polymer debris in the next cleaning operation in order to soften, burn and remove the polymer debris. Therefore, a running time for the next cleaning operation can be shortened.
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：提供通过软化和燃烧碎屑来预清洁待除去的聚合物碎屑的方法。 解决方案：在聚合物碎片预清洗方法中，进行使用全氟烃气体的蚀刻处理，然后提供特定的气体混合物。 接下来，使用从气体混合物产生的等离子体来清洗聚合物碎屑。 特定的气体混合物选自氧气和氮气的气体混合物，氢气和氩气的气体混合物，氩气和氮气的气体混合物以及氧气和氩气的气体混合物。 从气体混合物产生的等离子体可以在下一次清洁操作中完全去除聚合物碎屑，以便软化，燃烧和除去聚合物碎片。 因此，可以缩短下一次清洁操作的运行时间。

公开(公告)号：JP2002032991A

公开(公告)日：2002-01-31

申请号：JP2000211185

申请日：2000-07-12

Applicant: UNITED MICROELECTRONICS CORP

Inventor： KIM C HARDY

IPC: G11C11/413 ,  H01L21/822 ,  H01L27/04

Abstract: PROBLEM TO BE SOLVED: To provide a reference voltage generator for generating reference voltage being lower than power source voltage by quantity being selected previously. SOLUTION: A reference voltage source generates first reference voltage being higher than a ground potential by VREF. A first load element is coupled to a ground node, and generates an internal reference signal decided by magnitude of a current flowing in the first load element. A differential amplifier generates a signal decided by difference between a first input signal and a second input signal. A current adjusting switch has a control node coupled to an output of the differential amplifier, and it is coupled so that a current flowing in the first load element is decided. A second load element is coupled to the first load element in series and coupled to a power source node, its impedance is selected so that the second load element generates the second reference voltage.

公开(公告)号：JP2001166451A

公开(公告)日：2001-06-22

申请号：JP34312999

申请日：1999-12-02

Applicant: UNITED MICROELECTRONICS CORP

Inventor： KO SHUNJIN ,  KO GIYU ,  CHIN KEIJUN

IPC: H01L21/027 ,  G03F1/28 ,  G03F1/68 ,  G03F1/08

Abstract: PROBLEM TO BE SOLVED: To provide a phase shift mask having three different phase shift regions for eliminating the problem that corners have roundness in unexposed regions by diffraction and scattering of light, i.e., a corner round problem and a method for manufacturing the same. SOLUTION: The surface of a transparent substrate is provided with opaque mask patterns 415 which cover the first part of the transparent substrate and expose the second part of the transparent substrate. The proximate regions around the corners of the opaque mask patterns are evenly divided to the three different phase shift regions 430, 440 and 450 at a phase shift of 120 deg. from each other. These three phase shift regions are achieved by two times of etching steps for forming the first phase shift 430 and the second phase shift region 440. Namely, the region subjected to both of two times of the etching steps is the third phase shift region 450.

公开(公告)号：JP2001125253A

公开(公告)日：2001-05-11

申请号：JP30603199

申请日：1999-10-27

Applicant: UNITED MICROELECTRONICS CORP

Inventor： RIN BENJAMIN ZUUMIN

IPC: H01L21/027 ,  G03F1/29 ,  G03F1/32 ,  G03F1/68 ,  G03F1/08

Abstract: PROBLEM TO BE SOLVED: To provide a phase shift mask production method that improves the alignment accuracy of patterns and reduced in processing cost. SOLUTION: A photoresist layer is formed on a shielding layer in such a way that the photoresist layer has a vertical side wall, a deposited layer is uniformly formed on the photoresist layer and the shielding layer surrounding the photoresist layer, and the deposited layer is silylanized. In order to form a spacer on the vertical side wall, the deposited layer on the photoresist layer and the shielding layer surrounding the photoresist layer is removed and the deposited layer covering the top of the vertical side wall of the photoresist layer is partially removed. The shielding layer not covered with the photoresist layer and the spacer and a phase shifter layer are vertically removed and spacer and the shielding layer under the spacer are vertically removed. The photoresist layer is thoroughly removed so as to complete the objective phase shift mask.

公开(公告)号：JP2001110778A

公开(公告)日：2001-04-20

申请号：JP28395699

申请日：1999-10-05

Applicant: UNITED MICROELECTRONICS CORP

Inventor： RO CHUKAN ,  RO BUNSEN ,  SHU SHIKO ,  RIN KOYO

IPC: H01L21/302 ,  H01L21/3065 ,  H01L21/68 ,  H01L21/683

Abstract: PROBLEM TO BE SOLVED: To provide a device for preventing plasma from etching a wafer clamp in a semiconductor process. SOLUTION: This device has a receiving base, a lower electrode, a wafer clamp, a semiconductor wafer, a quartz ring, an upper electrode, a cooling plate, an anodize, and a gas hole. The wafer clamp is used for tightly pinching the semiconductor wafer and has a clamp ring, a recessed holder, and a recessed portion, and the clamp ring is used for supporting the semiconductor wafer. The recessed holder has one semi-ellipsoidal surface in the clamp ring, and during a deposition process or an etching process, polymer is formed on the back of the recessed holder to prevent the wafer clamp from being etched by plasma. The recessed portion is arranged at a position higher than the neighboring recessed holder.

公开(公告)号：JP2001053296A

公开(公告)日：2001-02-23

申请号：JP22206099

申请日：1999-08-05

Applicant: UNITED MICROELECTRONICS CORP

Inventor： RIN SHIGYO

IPC: H01L31/0232

Abstract: PROBLEM TO BE SOLVED: To reduce a flat thin film and a single protection layer and shorten the production cycle by forming a color filter lens on a part of a base and forming a conductor layer on the base and thereafter forming an insulation layer thereon. SOLUTION: A flat inner metallic dielectric layer is formed on a base (301) and a photosensitive region in exposed. A color filter lens layer is formed on an exposed photosensitive region of an inner metallic dielectric layer (302). A protection coating conductor is formed on the inner metallic dielectric layer (303), and after the protection coating conductor is made an upper metallic layer of a photosensor device, a single protecting layer as an insulation layer is formed and used for protection of a color filter lens and a metallic layer. Thereby, it is possible to reduce the flat thin film and a single protective layer, thus shortening the production cycle.

公开(公告)号：JP2001035822A

公开(公告)日：2001-02-09

申请号：JP19511999

申请日：1999-07-08

Applicant: UNITED MICROELECTRONICS CORP

Inventor： YO MEISEI ,  CHIN GAKUCHU ,  RIN SOEI ,  WU JUAN-YUAN

IPC: H01L21/304

Abstract: PROBLEM TO BE SOLVED: To provide a chemical mechanical polishing station that allows an operator to know the completion of polishing with ease. SOLUTION: This chemical mechanical polishing station serves to polish wafers in a damascene process step, and comprises a slurry supplier 32, a polishing pad 30, a polishing head 36 for decending wafer 38 while holding and rotating the wafer 38, a light emitting device 40 for irradiating slurry 34 with a light beam, an optical sensor 41 for receiving a reflected beam, and a spectrum analyzer connected to the sensor 41 for analyzing changes in color within the slurry 34.

公开(公告)号：JP2001015734A

公开(公告)日：2001-01-19

申请号：JP17302799

申请日：1999-06-18

Applicant: UNITED MICROELECTRONICS CORP

Inventor： TO MEISHU

IPC: H01L21/76 ,  H01L21/336 ,  H01L29/423 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To increase a current and voltage drive capabilities and to cope with the demand of the matching of high-voltage and low-voltage elements by covering a channel region and the upper section of a partial dielectric region in a gate region formed by forming and etching a gate layer and forming source-drain regions, using the gate region and the dielectric region as masks. SOLUTION: Drift regions 15 are formed to the sidewalls and surfaces of the lower sections of trench regions by ion implantation, using the nitride film of a semiconductor substrate 11 as a main body, and oxide films are formed on the sidewalls and surface of the bottom sections of the trench regions. The nitride film and a sacrificial oxide film are removed, the oxide film is thermoformed to the surface layer of the semiconductor substrate 11, two well regions are defined, N-type ion implantation and a standard annealing process are advanced and two N-type well regions 18 are formed. The oxide film is removed, and one gate oxide film 19 and N-type-doped polysilicon 20 are formed on the upper layer of the semiconductor substrate 11. Lastly, N+-doped polysilicon and N+ source 21 and drain 22 are formed by thermal diffusion or by ion implantation.

公开(公告)号：JP2001007107A

公开(公告)日：2001-01-12

申请号：JP16542499

申请日：1999-06-11

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHIN GAKUCHU ,  KO EKIMEI ,  YO MEISEI ,  WU JUAN-YUAN ,  RO KATETSU

IPC: H01L23/52 ,  H01L21/3205

Abstract: PROBLEM TO BE SOLVED: To prevent the electrical resistance of wiring from increasing by providing a dummy pattern which protects from excessive erosion caused by CMP(chemical mechanical polishing) within a high-density array. SOLUTION: An opening 200a and a groove 200b are formed in a dielectric layer 204 on a semiconductor substrate 202, and another opening 208 is simultaneously formed in the outside of the groove 200b when the opening 200a and the groove 200b are formed. Then, when metal is to be filled into the openings 200a and 200b, the metal is filled also into the opening 208, thus wiring 214a and 214b in a high-density array 206 and a metal line 216 in a dummy pattern 210 are formed. In this manner, the metal line 216 is allowed to function as a buffer material for preventing the wiring 214a and 214b from being excessively eroded.

公开(公告)号：JP2000306867A

公开(公告)日：2000-11-02

申请号：JP11076999

申请日：1999-04-19

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHIN GAKUCHU ,  YU KEISEI ,  WU JUAN-YUAN ,  RO KATETSU

IPC: H01L21/768 ,  H01L21/288 ,  H01L21/304 ,  H01L21/3063

Abstract: PROBLEM TO BE SOLVED: To provide a method for increasing uniformity of mechanochemical polishing, using an electrolytic conductor layer. SOLUTION: In this method for increasing uniformity of mechanochemical polishing using an electrolytic conductor layer, upon formation of a conductor layer, the conductor layer is processed in an electrolytic process to decrease the thickness of the conductor layer and remove uneven parts on its surface, and thereafter the surface of the conductor layer is polished in a mechanochemical polishing process. The thickness of the conductor layer is decreased by the electrolytic process, thereby shortening the time necessary by the subsequent mechanochemical polishing process. At the same time, since charges 34 are concentrated on projected parts on the surface of the conductor layer, the electrolysis rate of the projected parts becomes faster than that of recessed parts thereon, unevenness on the conductor layer surface is improved. When the conductor layer is formed through electroplating, its efficiency is further improved.