公开(公告)号：KR1020090005405A

公开(公告)日：2009-01-13

申请号：KR1020087029276

申请日：2007-05-30

Applicant: 도쿄엘렉트론가부시키가이샤

Inventor： 고노마사유키 ,  니시타다츠오 ,  나카니시도시오

IPC: H01L21/205

CPC classification number: C23C16/345 ,  C23C16/511 ,  H01L21/28273 ,  H01L21/3185 ,  H01L27/115 ,  H01L29/7843

Abstract: A plasma processing apparatus is provided with a process chamber which can be vacuumized; a placing table for placing a subject to be processed in the processing chamber; a microwave generating source for generating microwaves; a planar antenna, which has a plurality of slots and introduces the microwaves generated by the microwave generating source into the process chamber through the slots; a gas supply mechanism for supplying a film forming material gas into the process chamber; and a high-frequency power supply for supplying the placing table with high-frequency power. By using such plasma processing apparatus, a nitrogen containing gas and a silicon containing gas introduced into the process chamber are brought into the plasma state, and at the time of depositing a silicon nitride film on the surface of the substrate by the plasma, the placing table is supplied with high-frequency power.

Abstract translation: 一种等离子体处理装置具有能够被抽真空的处理室; 放置台，用于将待处理的对象放置在处理室中; 用于产生微波的微波发生源; 平面天线，其具有多个槽，并且通过所述槽将由所述微波发生源产生的所述微波引入所述处理室; 用于将成膜材料气体供给到处理室中的气体供给机构; 以及用于向放置台提供高频电力的高频电源。 通过使用这种等离子体处理装置，将引入到处理室中的含氮气体和含硅气体进入等离子体状态，并且在通过等离子体在基板的表面上沉积氮化硅膜时， 工作台提供高频电源。

公开(公告)号：KR1020070110943A

公开(公告)日：2007-11-20

申请号：KR1020077024630

申请日：2003-11-20

Applicant: 도쿄엘렉트론가부시키가이샤

Inventor： 나카니시도시오 ,  니시타다츠오 ,  오자키시게노리

IPC: H01L21/205 ,  H01L21/3065

CPC classification number: C23C8/36 ,  H01L21/3144 ,  H01L21/31662 ,  H01L21/3185 ,  H01L21/3211

Abstract: A plasma processing apparatus comprises a partition plate disposed between a plasma generating unit and a silicon substrate and having an opening. When a surface of the silicon substrate is nitrided in this plasma processing apparatus, the electron density in the surface of the silicon substrate is controlled to be within the range from 1e+7 (electrons.cm-3) to 1e+9 (electrons.cm-3). By using this plasma processing apparatus, deterioration of the silicon substrate and deterioration of a nitride film can be effectively suppressed.

Abstract translation: 等离子体处理装置包括设置在等离子体发生单元和硅衬底之间并具有开口的分隔板。 当在该等离子体处理装置中将硅衬底的表面氮化时，将硅衬底的表面中的电子密度控制在1e + 7（electrons.cm-3）至1e + 9（电子）的范围内。 厘米-3）。 通过使用该等离子体处理装置，可以有效地抑制硅衬底的劣化和氮化物膜的劣化。

公开(公告)号：KR1020050075442A

公开(公告)日：2005-07-20

申请号：KR1020057009094

申请日：2003-11-20

Applicant: 도쿄엘렉트론가부시키가이샤

Inventor： 나카니시도시오 ,  니시타다츠오 ,  오자키시게노리

IPC: H01L21/205

CPC classification number: C23C8/36 ,  H01L21/3144 ,  H01L21/31662 ,  H01L21/3185 ,  H01L21/3211

Abstract: A plasma processing apparatus comprises a partition plate disposed between a plasma generating unit and a silicon substrate and having an opening. When a surface of the silicon substrate is nitrided in this plasma processing apparatus, the electron density in the surface of the silicon substrate is controlled to be within the range from 1e+7 (electrons.cm-3) to 1e+9 (electrons.cm-3). By using this plasma processing apparatus, deterioration of the silicon substrate and deterioration of a nitride film can be effectively suppressed.

Abstract translation: 等离子体处理装置包括设置在等离子体发生单元和硅衬底之间并具有开口的分隔板。 当在该等离子体处理装置中将硅衬底的表面氮化时，将硅衬底的表面中的电子密度控制在1e + 7（electrons.cm-3）至1e + 9（电子）的范围内。 厘米-3）。 通过使用该等离子体处理装置，可以有效地抑制硅衬底的劣化和氮化物膜的劣化。

公开(公告)号：KR101380094B1

公开(公告)日：2014-04-01

申请号：KR1020127011218

申请日：2010-09-29

Applicant: 도쿄엘렉트론가부시키가이샤

Inventor： 사토요시히로 ,  시오자와도시히코 ,  니시타다츠오 ,  히로타요시히로

IPC: H01L21/316 ,  H01L21/76

CPC classification number: H01L21/76224 ,  H01J37/32192 ,  H01L21/02236 ,  H01L21/31111 ,  H01L21/823857

Abstract: 희생 산화막의 형성과 웨트 에칭에 의한 박리, 및/또는 이산화 규소막의 형성과 웨트 에칭에 의한 박리를 실행하는 반도체 장치의 제조 프로세스에 있어서, 희생 산화막 및/또는 이산화 규소막의 형성을, 플라즈마 처리 장치의 처리 용기 내에서, 산소를 포함하는 처리 가스를 이용하여 생성시킨 O(
1 D
2 ) 래디컬이 지배적인 플라즈마에 의해 실행한다.

公开(公告)号：KR1020100129311A

公开(公告)日：2010-12-08

申请号：KR1020107021877

申请日：2009-03-30

Applicant: 도쿄엘렉트론가부시키가이샤

Inventor： 혼다미노루 ,  나카니시도시오 ,  고노마사유키 ,  니시타다츠오 ,  미야하라준야

IPC: H01L21/318 ,  H01L21/205

CPC classification number: C23C16/345 ,  C23C16/45523 ,  C23C16/511 ,  H01J37/32192 ,  H01J2237/3321 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/28282

Abstract: CVD법으로 밴드갭의 크기를 제어하여 질화규소막을 제조하기 위해, 복수의 구멍을 갖는 평면 안테나(31)에 의해 처리 용기(1)에 마이크로파를 도입하는 플라즈마 CVD 장치(100)에 있어서, 0.1 Pa 이상 1333 Pa 이하의 범위 내에서 선택되는 일정한 처리 압력으로, 실리콘 함유 화합물 가스와 질소 가스의 유량비(실리콘 함유 화합물 가스 유량/질소 가스 유량)를 0.005 이상 0.2 이하의 범위 내에서 선택하여 플라즈마 CVD를 수행하고, 막 내에 포함되는 Si/N의 비를 제어하여 밴드갭의 크기가 2.5 eV 이상 7 eV 이하의 범위 내에 있는 질화규소막을 형성한다.

公开(公告)号：KR1020100014564A

公开(公告)日：2010-02-10

申请号：KR1020097019956

申请日：2008-03-26

Applicant: 도쿄엘렉트론가부시키가이샤 ,  고쿠리츠다이가쿠호진 히로시마다이가쿠

Inventor： 미야자키세이이치 ,  고노마사유키 ,  니시타다츠오 ,  나카니시도시오 ,  히로타요시히로

IPC: H01L21/8247 ,  H01L27/115

CPC classification number: H01L21/3185 ,  C23C16/345 ,  C23C16/511 ,  H01L21/28282 ,  H01L29/518 ,  H01L29/792 ,  H01L21/28202

Abstract: Provided is a silicon nitride film having excellent charge storage performance effective as a charge storage layer for a semiconductor memory device. The silicon nitride film having substantially uniform trap density in the film thickness direction has high charge storage performance. The silicon nitride film is formed by plasma CVD by using a plasma processing apparatus (100) wherein microwaves are introduced into a chamber (1) by a flat antenna (31) having a plurality of holes. Plasma is generated by the microwaves by introducing a material gas, which contains a nitrogen containing compound and a silicon containing compound, into the chamber (1), and the silicon nitride film is deposited on the surface of a body to be processed by the plasma.

Abstract translation: 提供了作为半导体存储器件的电荷存储层有效的具有优异的电荷存储性能的氮化硅膜。 在膜厚度方向上具有基本均匀的阱密度的氮化硅膜具有高电荷存储性能。 通过使用等离子体处理装置（100）通过等离子体CVD形成氮化硅膜，其中微波通过具有多个孔的平坦天线（31）引入到室（1）中。 通过将含有含氮化合物和含硅化合物的原料气体引入到室（1）中，通过微波产生等离子体，并且氮化硅膜沉积在待等离子体处理的物体的表面上 。

公开(公告)号：KR100900589B1

公开(公告)日：2009-06-02

申请号：KR1020077024629

申请日：2003-11-20

Applicant: 도쿄엘렉트론가부시키가이샤

Inventor： 나카니시도시오 ,  니시타다츠오 ,  오자키시게노리

IPC: H01L21/205

CPC classification number: C23C8/36 ,  H01L21/3144 ,  H01L21/31662 ,  H01L21/3185 ,  H01L21/3211

Abstract: 본 발명에 의하면, 실리콘 기판 표면을 질화 처리함에 있어서, 플라즈마 발생부와 실리콘 기판의 사이에 개구부를 갖는 구획판이 배치되고, 실리콘 기판 표면에 있어서의 전자 밀도가 1e+7(개·㎝
-3 )∼1e+9(개·㎝
-3 )로 되도록 제어된다. 본 발명에 의하면, 실리콘 기판 및 질화막의 열화가 효과적으로 억제된다.

公开(公告)号：KR1020080000684A

公开(公告)日：2008-01-02

申请号：KR1020077028247

申请日：2006-05-30

Applicant: 도쿄엘렉트론가부시키가이샤

Inventor： 야마시타준 ,  나카니시도시오 ,  니시타다츠오

IPC: H05H1/46 ,  H05H1/34

CPC classification number: H05H1/46 ,  H01J37/32192 ,  H01J37/32633 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/31654 ,  H01L21/31662 ,  H01L21/3185

Abstract: In a plasma oxidation treatment apparatus (100), double plates (60) are arranged above a susceptor (2). An upper plate (61) and a lower plate (62) are composed of a dielectric material such as quartz, separately arranged in parallel at a prescribed interval, for instance an interval of 5mm, and have a plurality of through holes (61a, 62a). The two plates are arranged one over another by shifting the positions so that the through hole (62a) of the lower plate (62) and the through hole (61a) of the upper plate (61) are not overlapped.

Abstract translation: 在等离子体氧化处理装置（100）中，在基座（2）的上方配置有双板（60）。 上板（61）和下板（62）由石英等电介质材料构成，分开地以规定的间隔平行布置，例如间隔5mm，并具有多个通孔（61a，62a） ）。 通过移动位置使两个板彼此重叠，使得下板（62）的通孔（62a）和上板（61）的通孔（61a）不重叠。

公开(公告)号：KR1020070110942A

公开(公告)日：2007-11-20

申请号：KR1020077024629

申请日：2003-11-20

Applicant: 도쿄엘렉트론가부시키가이샤

Inventor： 나카니시도시오 ,  니시타다츠오 ,  오자키시게노리

IPC: H01L21/205

CPC classification number: C23C8/36 ,  H01L21/3144 ,  H01L21/31662 ,  H01L21/3185 ,  H01L21/3211

Abstract: A plasma processing apparatus comprises a partition plate disposed between a plasma generating unit and a silicon substrate and having an opening. When a surface of the silicon substrate is nitrided in this plasma processing apparatus, the electron density in the surface of the silicon substrate is controlled to be within the range from 1e+7 (electrons.cm-3) to 1e+9 (electrons.cm-3). By using this plasma processing apparatus, deterioration of the silicon substrate and deterioration of a nitride film can be effectively suppressed.

Abstract translation: 等离子体处理装置包括设置在等离子体发生单元和硅衬底之间并具有开口的分隔板。 当在该等离子体处理装置中将硅衬底的表面氮化时，将硅衬底的表面中的电子密度控制在1e + 7（electrons.cm-3）至1e + 9（电子）的范围内。 厘米-3）。 通过使用该等离子体处理装置，可以有效地抑制硅衬底的劣化和氮化物膜的劣化。

公开(公告)号：KR1020070047773A

公开(公告)日：2007-05-07

申请号：KR1020077002817

申请日：2005-10-27

Applicant: 도쿄엘렉트론가부시키가이샤

Inventor： 니시타다츠오 ,  이시즈카스우이치 ,  후지노유타카 ,  나카니시도시오 ,  사토요시히로

IPC: H01L21/316 ,  H01L21/02

CPC classification number: H01L21/02332 ,  H01L21/0234 ,  H01L21/28202 ,  H01L21/3144 ,  H01L21/3145 ,  H01L27/10873

Abstract: In the present invention, when a gate insulation film in a DRAM is formed, an oxide film constituting a base of the gate insulation film is plasma-nitrided. The plasma nitridation is performed with microwave plasma generated by using a plane antenna having a large number of through holes. Nitrogen concentration in the gate insulation film formed by the plasma nitridation is 5 to 20% in atomic percentage. Even without subsequent annealing, it is possible to effectively prevent a boron penetration phenomenon in the DRAM and to reduce traps in the film causing deterioration in driving capability of the device.