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公开(公告)号：KR1020040048005A
公开(公告)日：2004-06-07
申请号：KR1020020075751
申请日：2002-12-02
Applicant: 한국전자통신연구원
IPC: H03H7/38
Abstract: PURPOSE: A variable impedance matching circuit is provided to change the electrical length of transmission lines and topology of variable inductance or variable capacitance by using an operation of a switch according to a control signal. CONSTITUTION: A variable impedance matching circuit includes a transmission line and a stub line. The stub line(32) is connected serially to or in parallel to the transmission line(31). The stub line and the transmission line include transmission line variable-blocks of N number. The transmission line variable-blocks are used for changing the electrical length of the transmission lines by using a switch. The switch is operated according to external control signals. The switch is formed with a MOSFET and a PIN diode.
Abstract translation: 目的：提供可变阻抗匹配电路，通过使用根据控制信号的开关的操作来改变传输线的电气长度和可变电感或可变电容的拓扑。 构成：可变阻抗匹配电路包括传输线和短截线。 短线（32）与传输线（31）串联连接或并联连接。 短线和传输线包括N数的传输线可变块。 传输线可变块用于通过使用开关来改变传输线的电长度。 开关根据外部控制信号进行操作。 开关由MOSFET和PIN二极管组成。
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公开(公告)号：KR1020170112201A
公开(公告)日：2017-10-12
申请号：KR1020160038917
申请日：2016-03-31
Applicant: 한국전자통신연구원
Abstract: 펄스레이더장치및 펄스레이더장치의운용방법이개시된다. 펄스레이더장치는기준신호를송신클럭신호로서입력받고, 상기송신클럭신호에기초하여, 송신펄스를오브젝트에송신하는송신부와, 상기기준신호를지연하여, 수신클럭신호로서출력하는부귀환루프부와, 상기오브젝트로부터상기송신펄스가반사되어수신되는반사펄스를, 상기수신클럭신호에기초하여복원하는수신부를포함하고, 상기부귀환루프부는상기기준신호와, 파형발생부에의해발생된임의파형신호를이용하여, 지연제어신호를생성하고, 상기지연제어신호에따라, 상기기준신호를지연하되, 상기임의파형신호를변경하여발생하도록상기파형발생부를제어하여, 상기지연제어신호를조정할수 있다.
Abstract translation: 公开了一种操作脉冲雷达装置和脉冲雷达装置的方法。 脉冲雷达装置接收所述参考信号作为传输时钟信号，基于发送时钟信号，延迟的传输，以及该参考信号到一个发射脉冲发送到所述物体时，负反馈环，并输出接收时钟信号和 ，在接收到反射的脉冲，传输脉冲被从对象反射的，包括：用于将所接收的时钟信号，由所述单元和所述基准信号，波形发生器产生的任意波形信号的负反馈环路部分的基础上恢复一个接收单元 可产生延迟控制信号以控制波形产生器延迟参考信号并根据延迟控制信号改变任意波形信号以调整延迟控制信号。
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公开(公告)号：KR1020130010439A
公开(公告)日：2013-01-28
申请号：KR1020120077970
申请日：2012-07-17
Applicant: 한국전자통신연구원
CPC classification number: H04B1/38 , H03G1/0088 , H03G3/001
Abstract: PURPOSE: A baseband structure of a transceiver is provided to selectively operate a fixed gain amplifier according to necessary gain and to reduce the size of a chip and power consumption. CONSTITUTION: A variable gain amplifier(VGA) controls gain. The variable gain amplifier amplifies an input signal. At least one fixed gain amplifier(FGA) is serially connected to the variable gain amplifier. The fixed gain amplifier amplifies an output signal of the variable gain amplifier. At least one or more selection switches selectively operate the fixed gain amplifiers.
Abstract translation: 目的：提供收发器的基带结构，以根据必要的增益选择性地操作固定增益放大器，并减小芯片的尺寸和功耗。 构成：可变增益放大器（VGA）控制增益。 可变增益放大器放大输入信号。 至少一个固定增益放大器（FGA）串联连接到可变增益放大器。 固定增益放大器放大可变增益放大器的输出信号。 至少一个或多个选择开关选择性地操作固定增益放大器。
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公开(公告)号：KR1020120106567A
公开(公告)日：2012-09-26
申请号：KR1020120023430
申请日：2012-03-07
Applicant: 한국전자통신연구원
Abstract: PURPOSE: A radar device for simultaneously supporting a short range radar function and a long range radar function is provided to implement high integration by forming components on a single chip. CONSTITUTION: An antenna unit(210) includes a transmission array antenna(211) and a reception array antenna(212). A transmitting unit(220) generates a plurality of chirp signals for long range transmission and a plurality of chirp signals for short range transmission by an FMCW(frequency modulated continuous-wave) modulation method and transmits the chirp signals using the transmission array antenna. A receiving unit processes a reflective wave signal received by the reception array antenna. A signal processor(231) generates a control signal for generating the plurality of the chirp signals for long range transmission and the plurality of the chirp signals for short range transmission and processes the signal from the receiving unit.
Abstract translation: 目的：提供同时支持短距离雷达功能和远程雷达功能的雷达设备，通过在单个芯片上形成组件来实现高集成度。 构成：天线单元（210）包括发射阵列天线（211）和接收阵列天线（212）。 发送单元（220）通过FMCW（调频连续波）调制方式生成用于长距离发送的多个线性调频信号和用于短距离发送的多个线性调频信号，并使用发送阵列天线发送线性调频信号。 接收单元处理由接收阵列天线接收的反射波信号。 信号处理器（231）产生用于产生用于远距离传输的多个线性调频脉冲信号的控制信号和用于短距离传输的多个线性调频信号，并处理来自接收单元的信号。
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公开(公告)号：KR100509947B1
公开(公告)日：2005-08-24
申请号：KR1020030015684
申请日：2003-03-13
Applicant: 한국전자통신연구원
IPC: H01F21/00
Abstract: 연속적으로 인덕턴스(inductance)를 가변할 수 있는 가변 인덕터(variable inductor) 동작 방법을 제공한다. 본 발명은 MOSFET 스위치에의 제어 신호 또는 가변 신호의 인가에 의해서 전체 인덕턴스 값이 연속적으로 가변될 수 있어, 정합 회로망이나 LC 공진 회로망 등에 효과적으로 적용될 수 있는 집적 회로 형태의 수동 소자로서의 가변 인덕터를 제공한다. 가변 인덕터는 기판 상에 구현된 입/출력의 두 단자들과 혹은 기판 밖의 입력/출력과 기판 상의 출력/입력, 그 사이에 구현된 다수의 개별 인덕터들과, 인덕터들 상호 간을 각각 직렬로 연결하는 주 경로들과, 인덕터들 사이의 주 경로들 각각과 출력을 직접적으로 연결하는 부 경로들, 및 인덕터들 사이의 주 경로들 각각과 부 경로들 각각의 사이에 각각 도입되는 MOSFET들을 포함하는 가변 인덕터의 MOSFET의 제어 전압을 MOSFET의 온(on) 전압과 오프(off) 전압 사이의 값으로 가변시켜 인덕터의 인덕턴스 값을 연속적으로 가변시킬 수 있다.
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Patent Agency Ranking
公开(公告)号：KR100412541B1
公开(公告)日：2003-12-31
申请号：KR1020010078269
申请日：2001-12-11
Applicant: 한국전자통신연구원
IPC: H04B1/16
Abstract: PURPOSE: An RF(Radio Frequency) receiver is provided to obtain a baseband signal and an IF(Intermediate Frequency) in which an image signal is cancelled by selectively inactivating frequency converters and obtaining a desired IF. CONSTITUTION: An LNA(Low Noise Amplifier)(103) amplifies a signal received through an antenna(101). The first frequency mixer unit including frequency converters(104,109) receives a signal outputted from the LNA(103), and outputs an in-phase signal and a quadrature phase signal of an IF. Variable gain amplifiers(105,110) amplify the signals outputted from the first frequency mixer unit. The second frequency mixer unit including frequency converters(112,114,116,117) receives the signals outputted from the variable gain amplifiers(105,110), and outputs an in-phase signal and a quadrature phase signal of a baseband. Switches(113,115) selectively inactivate the frequency converters(112,114,116,117) of the second frequency mixer unit. Adders(118,121) add the in-phase signal and the quadrature phase signal outputted from inactivated frequency converters of the second frequency mixer unit.
Abstract translation: 目的：提供RF（射频）接收器以获得基带信号和IF（中频），其中通过选择性地停用变频器并获得期望的IF来取消图像信号。 构成：LNA（低噪声放大器）（103）放大通过天线（101）接收的信号。 包括频率转换器（104,109）的第一混频器单元接收从LNA（103）输出的信号，并输出IF的同相信号和正交相位信号。 可变增益放大器（105,110）放大从第一混频器单元输出的信号。 包括频率转换器（112,114,116,117）的第二混频器单元接收从可变增益放大器（105,110）输出的信号，并且输出基带的同相信号和正交相位信号。 开关（113,115）选择性地使第二混频器单元的变频器（112,114,116,117）不起作用。 加法器（118,121）将从第二混频器单元的非激活频率转换器输出的同相信号和正交相位信号相加。
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公开(公告)号：KR1020030013193A
公开(公告)日：2003-02-14
申请号：KR1020010047549
申请日：2001-08-07
Applicant: 한국전자통신연구원
IPC: H03D7/00
CPC classification number: H03D7/1441 , H03D7/1408 , H03D7/1458 , H03D7/1466 , H03D7/1475
Abstract: PURPOSE: A frequency mixer using half local oscillation frequency is provided to remove an offset of a direct current voltage when using a frequency mixer at a homo heterodyne transceiver, and to half a frequency of a local oscillator needed for a high frequency heterodyne transceiver. CONSTITUTION: The first and second input terminals(IN+,IN-) receive high frequency signals as differential signals. The first mixing part(100) comprises the first and second NMOS transistors(M10,M20), which have sources connected to the first input terminal(IN+), drains connected to each other, and gates connected to receive signals(LO+,LO-) from a local oscillator. The second mixing part(200) comprises the third and fourth NMOS transistors(M30,M40), which have sources connected to the second input terminal(IN-), drains connected to each other, and gates connected to receive the signals(LO+,LO-) from the local oscillator.
Abstract translation: 目的：提供使用半本地振荡频率的混频器，以在同频外差收发器使用混频器时消除直流电压的偏移，以及高频外差收发器所需的本地振荡器的一半频率。 构成：第一和第二输入端子（IN +，IN-）接收高频信号作为差分信号。 第一混合部分（100）包括第一和第二NMOS晶体管（M10，M20），其具有连接到第一输入端（IN +）的源极，彼此连接的漏极，以及连接到接收信号（LO +，LO- ）从本地振荡器。 第二混合部分（200）包括具有连接到第二输入端子（IN-）的源极的第三和第四NMOS晶体管（M30，M40），彼此连接的漏极，以及连接以接收信号（LO +， LO-）。
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公开(公告)号：KR1020030002416A
公开(公告)日：2003-01-09
申请号：KR1020010038011
申请日：2001-06-29
Applicant: 한국전자통신연구원
IPC: H01L27/04
Abstract: PURPOSE: A multi-metal inductor is provided to reduce a loss of a substrate and minimize a loss of a serial resistance generated from an inductor line by controlling the width of metal wires. CONSTITUTION: The first insulating layer(20) of TEOS/BPSG is formed on a silicon substrate(10). The second insulating layer(40) having a structure of SiO2/SOG/SiO2 is formed on the first insulating layer(20). The first metal wire(30) is formed on the second insulating layer(40). A via-hole(50) is formed on the second insulating layer(40) in order to connect the second metal wire(60) for forming the first metal wire(30) and the inductor. The third insulating layer(80) having the structure of SiO2/SOG/SiO2 is formed on the second insulating layer(40). A plurality of metal layers are formed within the third insulating layer(60). The third metal wire(70) is formed on the second metal wire(60). The third metal wire(70) is protected by a protective layer(90). The third metal wire(70) is connected with the second metal wire(60) through a via hole(51).
Abstract translation: 目的：提供多金属电感以减少基板的损耗，并通过控制金属线的宽度来最小化从电感线产生的串联电阻的损失。 构成：TEOS / BPSG的第一绝缘层（20）形成在硅衬底（10）上。 在第一绝缘层（20）上形成具有SiO 2 / SOG / SiO 2结构的第二绝缘层（40）。 第一金属线（30）形成在第二绝缘层（40）上。 为了连接用于形成第一金属线（30）的第二金属线（60）和电感器，在第二绝缘层（40）上形成通孔（50）。 具有SiO 2 / SOG / SiO 2结构的第三绝缘层（80）形成在第二绝缘层（40）上。 在第三绝缘层（60）内形成多个金属层。 第三金属线（70）形成在第二金属线（60）上。 第三金属线（70）由保护层（90）保护。 第三金属线（70）通过通孔（51）与第二金属线（60）连接。
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公开(公告)号：KR101682652B1
公开(公告)日：2016-12-06
申请号：KR1020130060190
申请日：2013-05-28
Applicant: 한국전자통신연구원
CPC classification number: G01S13/103 , G01S7/28 , G01S13/0209
Abstract: 높은해상도를갖는펄스레이더장치를제시한다. 제시된장치는송신펄스반복주기를갖는송신트리거신호를근거로펄스를발생시켜송신안테나를통해목표물에게로송신하는펄스발생부, 외부로부터의클록을이용하여송신트리거신호를생성하여펄스발생부에게로제공하고외부로부터의클록을이용하여송신펄스반복주기와는시간차이나는다수의클록신호를발생시키는동기화부, 및외부로부터의선택신호에근거하여다수의클록신호에서어느한 클록신호를선택하여수신기의샘플러의샘플링클록으로제공하는스위치부를포함한다.
Abstract translation: 公开了一种脉冲雷达装置。 脉冲雷达装置包括脉冲发生单元，接收单元，同步单元和开关单元。 脉冲发生单元基于具有发送脉冲重复周期的发送触发信号产生脉冲，并且经由发送天线将脉冲发送到目标。 同步单元使用外部参考时钟生成发送触发信号，向脉冲发生单元提供发送触发信号，并且使用外部参考时钟产生相对于发送脉冲触发信号具有时间延迟的多个时钟信号。 开关单元响应于外部选择信号从多个时钟信号中选择一个时钟信号，并将所选择的时钟信号提供给采用具有提供的采样时钟的采样器的接收器单元。
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公开(公告)号：KR1020150108147A
公开(公告)日：2015-09-25
申请号：KR1020140030970
申请日：2014-03-17
Applicant: 한국전자통신연구원
Abstract: 본 발명은 안테나와 송수신 칩 및 디지털 신호처리 칩을 하나의 패키지로 소형화, 집적화, 경량화하기 위해 단일 기판 위에 안테나와 레이더 온 칩으로 패키징하는 밀리미터파용 레이더 온 패키지에 관한 것으로, 밀리미터파용 레이더 온 패키지는, 다층 기판; 상기 다층 기판의 일면에 배치되는 RFIC 송신 모듈과 RFIC 수신 모듈로 구성되는 RFIC 칩; 및 상기 다층 기판의 타면에 형성되어 안테나 송신부와 안테나 수신부를 구성하며, 유전체 공진기 안테나의 노출 영역인 다수의 멀티 어레이 안테나를 포함한다.
Abstract translation: 本发明涉及一种用于毫米波的雷达，其能够在单个基板上封装天线和雷达，用于将天线，发射和接收芯片以及数字信号处理芯片小型化，集成和照明，以便将其作为 一包 用于毫米波的包装雷达包括：多层基板; RFIC芯片，其由布置在所述多层基板的一侧上的RFIC传输模块和RFIC接收模块构成; 并且形成在多层基板的另一侧上的多个多阵列天线包括天线发送单元和天线接收单元，并且是介质谐振器天线的曝光区域。
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