公开(公告)号：GB2595125A

公开(公告)日：2021-11-17

申请号：GB202111358

申请日：2020-02-24

Applicant: IBM

Inventor： RUILONG XIE ,  JULIEN FROUGIER ,  CHANRO PARK ,  EDWARD NOWAK ,  YI QI ,  KANGGUO CHENG ,  NICOLAS JEAN LOUBET

IPC: H01L29/41

Abstract: Embodiments of the present invention are directed to techniques for providing an novel field effect transistor (FET)architecture that includes a center fin region and one or more vertically stacked nanosheets.In a non-limiting embodiment of the invention, a nanosheet stack is formed over a substrate.The nanosheet stack can include one or more first semiconductor layers and one or more first sacrificial layers.A trench is formed by removing a portion of the one or more first semiconductor layers and the one or more first sacrificial layers.The trench exposes a surface of a bottommost sacrificial layer of the one or more first sacrificial layers.The trench can be filled with one or more second semiconductor layers and one or more second sacrificial layers such that each of the one or more second semiconductor layers is in contact with a sidewall of one of the one or more first semiconductor layers.

公开(公告)号：GB2567363B

公开(公告)日：2019-08-28

申请号：GB201901614

申请日：2017-07-21

Applicant: IBM

Inventor： SON VAN NGUYEN ,  TENKO YAMASHITA ,  KANGGUO CHENG ,  THOMAS JASPER HAIGH JR ,  CHANRO PARK ,  ERIC LINIGER ,  JUNTAO LI ,  SANJAY MEHTA

IPC: H01L21/768 ,  H01L21/02 ,  H01L29/49

公开(公告)号：GB2567363A

公开(公告)日：2019-04-10

申请号：GB201901614

申请日：2017-07-21

Applicant: IBM

Inventor： SON VAN NGUYEN ,  TENKO YAMASHITA ,  KANGGUO CHENG ,  THOMAS JASPER HAIGH JR ,  CHANRO PARK ,  ERIC LINIGER ,  JUNTAO LI ,  SANJAY MEHTA

IPC: H01L21/768 ,  H01L21/02 ,  H01L29/49

Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.