公开(公告)号：HU0303965A2

公开(公告)日：2004-03-01

申请号：HU0303965

申请日：2002-04-17

Applicant: IBM

Inventor： CHIU GEORGE LIANG-TAI ,  MAGERLEIN JOHN HAROLD

IPC: H01L25/18 ,  H01L23/498 ,  H01L25/04 ,  H01L23/538

Abstract: A semiconductor or dielectric wafer with conducting vias is used as a substrate in an integrated circuit packaging structure, where high density inter and intra chip contacts and wiring are positioned on the substrate face on which the integrated circuitry is mounted, and external signal and power circuitry is contacted through the opposite face. Use of a substrate such as silicon permits the use of conventional silicon processes available in the art for providing high wiring density together with matching of the thermal expansion coefficient of any silicon chips in the integrated circuits. The use of vias through the substrate allows a high density of connections leaving the silicon substrate and provides short paths for the connections of power and signals.

公开(公告)号：CA2352168C

公开(公告)日：2005-07-05

申请号：CA2352168

申请日：1999-11-29

Applicant: IBM

Inventor： CORDES STEVEN ALLEN ,  DOYLE JAMES PATRICK ,  CHIU GEORGE LIANG-TAI ,  CORDES MICHAEL JAMES ,  BUDD RUSSELL ALAN

IPC: H01J11/02 ,  G02B5/20 ,  G02F1/1335 ,  G03F7/00 ,  G09F9/00 ,  G09F9/30

Abstract: Three component color sub-pixel element areas (10, 12, 15) of red, green and blue, are serially formed in an overall pixel area (9), on a transparent substrate (2), and after each individual color sub pixel element formation, a layer of protective transparent material (11, 14, 16) is applied over the individual sub pixel element (10, 12, 15) and th e pixel area before formation of the next sub pixel element. The protective layers render the sub pixel elements unaffected by the processing of subsequent sub pixel members where such conditions as high temperature curing, hardening agents or hardening processes are involved, whereby advantages are achieved in manufacturability, reliability, yield, cost, and throughput.

公开(公告)号：CZ20032834A3

公开(公告)日：2004-02-18

申请号：CZ20032834

申请日：2002-04-17

Applicant: IBM

Inventor： CHIU GEORGE LIANG-TAI ,  MAGERLEIN JOHN HAROLD

IPC: H01L25/18 ,  H01L23/498 ,  H01L25/04 ,  H01L23/538

Abstract: A semiconductor or dielectric wafer with conducting vias is used as a substrate in an integrated circuit packaging structure, where high density inter and intra chip contacts and wiring are positioned on the substrate face on which the integrated circuitry is mounted, and external signal and power circuitry is contacted through the opposite face. Use of a substrate such as silicon permits the use of conventional silicon processes available in the art for providing high wiring density together with matching of the thermal expansion coefficient of any silicon chips in the integrated circuits. The use of vias through the substrate allows a high density of connections leaving the silicon substrate and provides short paths for the connections of power and signals.

公开(公告)号：PL347975A1

公开(公告)日：2002-05-06

申请号：PL34797599

申请日：1999-11-29

Applicant: IBM

Inventor： BUDD RUSSELL ALAN ,  CHIU GEORGE LIANG-TAI ,  CORDES MICHAEL JAMES ,  CORDES STEVEN ALLEN ,  DOYLE JAMES PATRICK

IPC: H01J11/02 ,  G02B5/20 ,  G02F1/1335 ,  G03F7/00 ,  G09F9/00 ,  G09F9/30

Abstract: Three component color sub-pixel element areas of red,green and blue, are serially formed in an overall pixel area, on a transparent substrate, and after each individual color sub pixel element formation, a layer of protective transparent material is applied over the individual sub pixel element and the pixel area before formation of the next sub pixel element. The protective layers render the sub pixel elements unaffected by the processing of subsequent sub pixel members where such conditions as high temperature curing, hardening agents or hardening processes are involved, whereby advantages are achieved in manufacturability, reliability, yield, cost, and throughput.

公开(公告)号：DE69611561T2

公开(公告)日：2001-06-21

申请号：DE69611561

申请日：1996-02-13

Applicant: IBM

Inventor： CHIU GEORGE LIANG-TAI ,  CIPOLLA THOMAS M ,  DOANY FUAD E ,  DOVE DEREK B ,  ROSENBLUTH ALAN E ,  SINGH RAMA N ,  WILCZYNSKI JANUSZ S

IPC: G02F1/13 ,  G02F1/1335 ,  H04N5/74 ,  H04N9/31

Abstract: An optical system is described consisting of reflection birefringent light valves, polarizing beam splitter, color image combining prisms, illumination system, projection lens, filters for color and contrast control, and screen placed in a configuration offering advantages for a high resolution color display. The illumination system includes a light tunnel having a cross-sectional shape corresponding to the geometrical shape of the spacial light modulator to optimize the amount of light projected onto the screen.