公开(公告)号：GB2484845A

公开(公告)日：2012-04-25

申请号：GB201200153

申请日：2010-08-04

Applicant: IBM

Inventor： DEBROSSE JOHN K

IPC: G11C19/08 ,  G11C8/10 ,  G11C8/14

Abstract: A high density memory architecture comprising magnetic racetrack memory, and an operating method. The architecture comprises a plurality of magnetic memory structures, a sensor associated with each structure, a first decoder initiating a track select signal for activating a single structure from among the plurality to perform a bit read or bit storage operation, a bit drive for applying a first signal to form a new memory domain associated with a value to be stored in the structure at a first position, and a second decoder applying a second signal for advancing each formed domain toward a second position of the structure. The sensor reads a value stored at a domain at the second position of the structure. Subsequently, a new domain associated with a value just read is formed such that the structure is returned to its original state at an end of the read operation.

公开(公告)号：DE602007013472D1

公开(公告)日：2011-05-05

申请号：DE602007013472

申请日：2007-12-04

Applicant: IBM

Inventor： GAIDIS MICHAEL C ,  CLEVENGER LAWRENCE A ,  DALTON TIMOTHY J ,  DEBROSSE JOHN K ,  HSU LOUIS L ,  RADENS CARL ,  WONG KEITH K ,  YANG CHIH-CHAO

IPC: G11C19/08 ,  G11B5/008

公开(公告)号：DE3883185D1

公开(公告)日：1993-09-16

申请号：DE3883185

申请日：1988-11-30

Applicant: IBM

Inventor： CRITCHLOW DALE L ,  DEBROSSE JOHN K ,  MOHLER RICK L ,  NOBLE WENDELL P ,  PARRIES PAUL C

IPC: H01L21/28 ,  H01L21/74 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/10 ,  H01L27/108 ,  H01L21/82