公开(公告)号：DE102012220825A1

公开(公告)日：2013-06-06

申请号：DE102012220825

申请日：2012-11-15

Applicant: IBM

Inventor： MESSENGER BRIAN W ,  PARRIES PAUL C ,  PEI CHENGWEN ,  WANG GENG ,  ZHANG YANLI

IPC: H01L27/12 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/84 ,  H01L23/52 ,  H01L27/108

Abstract: Ein Verfahren zum Bilden einer Grabenstruktur, welches das Bilden einer metallhaltigen Schicht zumindest auf den Seitenwänden eines Grabens und das Bilden eines undotierten Halbleiter-Füllmaterials innerhalb des Grabens aufweist. Das undotierte Halbleiter-Füllmaterial und die metallhaltige Schicht werden mit einer ersten Ätzbehandlung bis zu einer ersten Tiefe innerhalb des Grabens zurückgenommen. Das undotierte Halbleiter-Füllmaterial wird anschließend mit einer zweiten Ätzbehandlung bis zu einer zweiten Tiefe innerhalb des Grabens zurückgenommen, die größer als eine erste Tiefe ist. Durch die zweite Ätzbehandlung wird zumindest ein Seitenwandabschnitt der metallhaltigen Schicht frei gelegt. Der Graben wird mit einer dotierten Halbleiter enthaltenden Materialfüllung gefüllt, wobei die dotierte Halbleitermaterialfüllung mit dem zumindest einen Seitenwandabschnitt der metallhaltigen Schicht in direktem Kontakt steht.

公开(公告)号：DE69123884T2

公开(公告)日：1997-07-17

申请号：DE69123884

申请日：1991-06-11

Applicant: IBM

Inventor： ABERNATHEY JOHN R ,  MANN RANDY W ,  PARRIES PAUL C ,  SPRINGER JULIE A

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/532 ,  H01L21/60 ,  H01L23/485

Abstract: A method of forming interconnections of devices of integrated circuits, especially interconnecting spaced source/drain regions and/or gate regions, and the resulting structures are provided. An etch-stop material (24) such as silicon dioxide is deposited over the entire substrate (10) on which the devices are formed. A layer of silicon (26) is deposited over etch-stop material, and the silicon is selectively etched to reveal the etch-stop material at the regions (12, 20) to be connected. The etch-stop material (24) at those regions is then removed. Following this a high-conductivity material (34), which is either a refractory metal or a silicide formed from layers of silicon and a refractory metal, is formed on the substrate connecting the spaced regions (12, 20).

公开(公告)号：DE69123884D1

公开(公告)日：1997-02-13

申请号：DE69123884

申请日：1991-06-11

Applicant: IBM

Inventor： ABERNATHEY JOHN R ,  MANN RANDY W ,  PARRIES PAUL C ,  SPRINGER JULIE A

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/532 ,  H01L21/60 ,  H01L23/485

Abstract: A method of forming interconnections of devices of integrated circuits, especially interconnecting spaced source/drain regions and/or gate regions, and the resulting structures are provided. An etch-stop material (24) such as silicon dioxide is deposited over the entire substrate (10) on which the devices are formed. A layer of silicon (26) is deposited over etch-stop material, and the silicon is selectively etched to reveal the etch-stop material at the regions (12, 20) to be connected. The etch-stop material (24) at those regions is then removed. Following this a high-conductivity material (34), which is either a refractory metal or a silicide formed from layers of silicon and a refractory metal, is formed on the substrate connecting the spaced regions (12, 20).

公开(公告)号：CA2043172C

公开(公告)日：1996-04-09

申请号：CA2043172

申请日：1991-05-24

Applicant: IBM

Inventor： ABERNATHEY JOHN R ,  MANN RANDY W ,  PARRIES PAUL C ,  SPRINGER JULIE A

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/532 ,  H01L23/522

Abstract: A method of forming interconnections of devices of integrated circuits, especially interconnecting spaced source/drain regions and/or gate regions, and the resulting structures are provided. An etch-stop material such as silicon dioxide is deposited over the entire substrate on which the devices are formed. A layer of silicon is deposited over etch-stop material, and the silicon is selectively etched to reveal the etch-stop material at the regions to be connected. The etch-stop material at those regions is then removed. Following this a high-conductivity material, which is either a refractory metal or a silicide formed from layers of silicon and a refractory metal, is formed on the substrate connecting the spaced regions.

公开(公告)号：BR9201351A

公开(公告)日：1992-12-01

申请号：BR9201351

申请日：1992-04-13

Applicant: IBM

Inventor： LEE PEI-ING P ,  LICATA THOMAS J ,  MCDEVITT THOMAS L ,  PARRIES PAUL C ,  PENNINGTON SCOTT L ,  RYAN JAMES G ,  STRIPPE DAVID C

IPC: C23C14/46 ,  C23C14/04 ,  H01L21/203 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768 ,  H05K3/40

Abstract: A sputtering deposition wherein high aspect ratio apertures (50) are coated with conductive films (40) exhibiting low bulk resistivity, low impurity concentrations, and regular morphologies. A collimator (60) is used having an aspect ratio that approximates the aspect ratio of the apertures (50). The resulting film thickness at the bottom of the aperture is at least 2X what can be achieved using conventional sputtering methods.