公开(公告)号：JP2000223599A

公开(公告)日：2000-08-11

申请号：JP2000024329

申请日：2000-02-01

Applicant: LUCENT TECHNOLOGIES INC

Inventor： SHAOJUN DEN ,  KIZILYALLI ISIK C ,  KUEHNE STEPHEN C

IPC: H01L21/8247 ,  H01L21/316 ,  H01L27/00 ,  H01L27/115 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To provide an inexpensive memory element which can be manufactured in a less number of manufacturing steps and/or can have a less number of constituent elements. SOLUTION: This memory element includes a substrate 11, having a source region 12, a drain region 15, and a channel region 23 therebetween, a first conductive region 26 connected to the source region 12, a second conductive region 28 connected to the drain region 15, an ion layer 31 containing ions and connected to the substrate 11, and a means 35 for moving the ions in such a manner as to influence the conductive property of the channel region 23. When the memory element is in logical HIGH state, the ions are moved towards the cannel region 23 by the polarity of an electric field, so that the channel region 23 becomes conductive. When the element is in logically LOW state, the ions are moved in the direction away from the channel region 23 by the electric field polarity, so that the channel region 23 becomes non-conductive.

公开(公告)号：JPH10303424A

公开(公告)日：1998-11-13

申请号：JP10637798

申请日：1998-04-16

Applicant: LUCENT TECHNOLOGIES INC

Inventor： RICHARD W GREGER ,  KIZILYALLI ISIK C

IPC: H01L21/8247 ,  H01L21/205 ,  H01L21/30 ,  H01L21/336 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/10 ,  H01L27/115 ,  H01L29/49 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To provide a new device in which the efficiency of a passivated device is not deteriorated with the lapse of time, by employing an isotope of hydrogen for passivating a layer. SOLUTION: A semiconductor device 10 has a substrate 12, and at least a part of the substrate 12 is made of Si. The semiconductor device 10 also includes a dielectric structure 18. This dielectric structure 18 is a field oxide containing an isotope of hydrogen at an appropriate concentration. This dielectric structure 18 is formed by thermal growth in the presence of steam of deuterium oxide or steam of another isotope of hydrogen. The steam of hydrogen isotopes must contain the hydrogen isotope at the highest possible concentration. The normal hydrogen concentration must not exceed 1 ppm in this steam. Thus, the hydrogen isotopes contribute to improvement in a process of deterioration of the semiconductor device 10.

公开(公告)号：JPH09186171A

公开(公告)日：1997-07-15

申请号：JP32632396

申请日：1996-12-06

Applicant: LUCENT TECHNOLOGIES INC

Inventor： HAM THOMAS EDWARD ,  KIZILYALLI ISIK C

IPC: H01L29/73 ,  H01L21/265 ,  H01L21/331 ,  H01L29/10 ,  H01L29/167 ,  H01L29/732

Abstract: PROBLEM TO BE SOLVED: To provide a high speed element having a high collector current without deteriorating the performance about the initial voltage and punch- through. SOLUTION: An n-epitaxial region 15 to be a collector region is formed on a p-type substrate 11, In ions are implanted in the region 15 to form a base region 25 and an emitter region 33 adjacent to the base region 25 is formed. The base formed by doping In forms a high speed transistor having a narrow base. Owing to the imperfect ionization of the In dopant, an element having a high collector current without deteriorating the performance about the initial voltage and punch-through can be formed.

公开(公告)号：JP2001217187A

公开(公告)日：2001-08-10

申请号：JP2000372411

申请日：2000-12-07

Applicant: LUCENT TECHNOLOGIES INC

Inventor： DAVID MAKUERUROI BOURIN ,  FARROW REGINALD CONWAY ,  KIZILYALLI ISIK C ,  NEISU RAYADI ,  MKRTCHYAN MASIS

IPC: G03F7/20 ,  G03F9/00 ,  H01J37/304 ,  H01J37/305 ,  H01L21/027 ,  H01L23/544

Abstract: PROBLEM TO BE SOLVED: To provide a method for forming an alignment feature and for connecting it to a SCALPEL tool in or on a multilayer semiconductor structure for the purpose of alignment with a lithography mask. SOLUTION: This method is to form a multilayer semiconductor structure equipped with an alignment feature for alignment with a lithography mask or for use with a SCALPEL tool. This invention is suitable particularly for a submicron CMOS technology device and circuit, but is not limited to them. This invention is useful because of the use of an electron beam source for both alignment and exposure of a lithography mask on a semiconductor wafer, and further useful become of an alignment feature in an earlier stage (that is, zero level) of a semiconductor device manufacturing process.

公开(公告)号：JP2001196468A

公开(公告)日：2001-07-19

申请号：JP2000366458

申请日：2000-12-01

Applicant: LUCENT TECHNOLOGIES INC

Inventor： KIZILYALLI ISIK C ,  SINGH RANBIR ,  LORI STERLING

IPC: H01L27/092 ,  H01L21/28 ,  H01L21/8238 ,  H01L27/105 ,  H01L29/49

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device that reduces no density of channel carries and the switching rate of a device and causes no time delay, or no malfunction of a gate. SOLUTION: In a semiconductor device 100 provided on a semiconductor substrate where first and second transistors 115 and 120 of completely opposite types are formed, the semiconductor device includes a first gate electrode 155 containing a first metal gate electrode material with a work function compatible with the first transistor 115, and a second gate electrode 160 containing a second metal gate electrode material with a work function compatible with the second transistor 120. Also, in the second gate electrode 160, a first metal gate electrode material 162b is also provided on a second metal gate electrode material 162a, thus forming a gate stack.

公开(公告)号：JP2001024064A

公开(公告)日：2001-01-26

申请号：JP2000123012

申请日：2000-04-24

Applicant: LUCENT TECHNOLOGIES INC

Inventor： KIZILYALLI ISIK C ,  MA YI ,  RADOSEVICH JOSEPH R ,  PRADIP KUMAR ROY

IPC: H01L21/3213 ,  H01L21/316 ,  H01L21/8234 ,  H01L27/088

Abstract: PROBLEM TO BE SOLVED: To form a gate oxide layer with two types of thicknesses in a semiconductor device by allowing an oxygen diffusion barrier layer to check change of a second thickness of a gate oxide layer during formation of a first thickness of gate oxide. SOLUTION: A gate oxide layer 30 is formed to a predetermined first thickness 32 on a substrate 20, and an oxygen diffusion barrier layer 40 is deposited on the gate oxide layer 30. Thereafter, a photoresist mask is selectively patterned on the barrier layer 40. Then, a photoresist mask is removed, a gate- dielectric stack structure 10 is subjected to thermal oxidation process, and a new gate oxide layer 30 is formed on a first device 50. The gate oxide layer 30 is selectively formed to a second thickness 34 which is different from the first thickness 32. The oxygen diffusion barrier layer 40 deposited on the gate oxide layer 30 of a second device 60 checks further oxidation of the gate oxide layer 30.

公开(公告)号：JPH10303303A

公开(公告)日：1998-11-13

申请号：JP10638298

申请日：1998-04-16

Applicant: LUCENT TECHNOLOGIES INC

Inventor： RICHARD W GREGER ,  KIZILYALLI ISIK C ,  RANBIA SHIN

IPC: H01L21/82 ,  H01L21/28 ,  H01L21/8247 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To manufacture a new element wherein no secular change in efficiency which a passivated device has is comprised, by forming a dielectrics layer, on a substrate, comprising a hydrogen isotope of significant concentration, and forming a control gate on the dielectrics layer. SOLUTION: Relating to a semiconductor device 10, a source region 14 and a drain region 16 are formed in a substrate 12, and under the presence of a hydrogen isotope vapor, thermalgrowth is performed to form an oxide layer 18. Then, on the oxide layer 18, a polysilicon layer 22 is deposited, doped, and etched to form a gate 20. On the polysilicon layer 22 of the gate 20, a dielectrics layer 26 is formed, on which a control gate 28 is formed. Thus, such new element as indicates no secular change in efficiency which a passivated device indicates can be manufactured.

公开(公告)号：JPH10303216A

公开(公告)日：1998-11-13

申请号：JP10516198

申请日：1998-04-15

Applicant: LUCENT TECHNOLOGIES INC

Inventor： KIZILYALLI ISIK C

IPC: H01L29/73 ,  H01L21/30 ,  H01L21/316 ,  H01L21/324 ,  H01L21/331 ,  H01L29/16 ,  H01L29/732

Abstract: PROBLEM TO BE SOLVED: To eliminate efficiency deterioration on a semiconductor device passivated by a hydrogen passivation process by adopting especially hydrogen isotope for passivation of a bipolar transistor. SOLUTION: A bipolar transistor 10 has one or a plurality of base dielectric structures 20. The base dielectric structure 20 contains hydrogen isotope of considerable concentration and is formed by heat growth desirably in the presence of vapor of hydrogen isotope. Vapor of the hydrogen isotope contains hydrogen isotope of concentration concentration as high as possible. The considerable concentration means concentration which contains hydrogen isotope of at least 10 cm . Although vapor of hydrogen isotope is oxidation heavy water (D2 O), for example, heavier hydrogen isotope including ionic form of various kinds of hydrogen isotope is applicable.

公开(公告)号：GB2372150A

公开(公告)日：2002-08-14

申请号：GB0211288

申请日：2000-11-27

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BOULIN DAVID M ,  FARROW REGINALD C ,  KIZILYALLI ISIK C ,  MKRTCHYAN MASIS ,  LAYADI NACE

IPC: H01J37/304 ,  H01L23/544

Abstract: A method of forming a multi-layered semiconductor structure having substrate (20) comprises the steps of forming an alignment feature (60) in or on substrate (20), and aligning lithography mask (140) using alignment feature (60) with a Scattering with Angular Limitation in Projection Electron-beam Lithography (SCALPEL) tool (100) having an electron beam source (110) for directing an electron beam toward semiconductor structure (10). The alignment feature (60) is detected as it backscatters a greater amount of electrons than the surrounding substrate (20). This information may then be used to align lithography mask (140). The alignment feature (60) may include shallow trench (22, Fig. 1) containing silicon dioxide (30) and a high atomic number material (50) selected from tungsten, tantalum, cobalt, titanium, or the silicides and nitrides of these metals. The alignment feature (60) may be formed in a polysilicon layer on a silicon dioxide layer.

公开(公告)号：GB2351843B

公开(公告)日：2001-09-26

申请号：GB0013885

申请日：2000-06-07

Applicant: LUCENT TECHNOLOGIES INC

Inventor： KIZILYALLI ISIK C ,  MASTRAPASQUA MARCO

IPC: H01L29/772 ,  C23C14/08 ,  C23C14/58 ,  H01L21/02 ,  H01L21/28 ,  H01L21/316 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/51 ,  H01L29/76

Abstract: The present invention relates to a heterojunction structure based upon the oxide/high-k dielectric barrier. In exemplary embodiment, a silicon layer has a silicon dioxide layer thereon, and a high-k dielectric material disposed on the oxide layer. Thereafter, a metal layer, serving as the gate metal for the device is disposed on the high-k dielectric. The silicon dioxide layer has a relatively high barrier height, but has a relatively small thickness, and relative to the high-k dielectric, the barrier height differential fosters real space transfer. In this structure, the high barrier height of the silicon dioxide layer results in higher mobility and thereby greater substrate current. By virtue of the relative thick layer of high-k dielectric, leakage current is significantly reduced. Thus, the high-k dielectric material/oxide interface gives the needed barrier thickness to prevent leakage, but enables tunneling of hot electrons through the silicon dioxide into the metal layer with a sufficient applied voltage.