Abstract:
unidade de microeletrônica, conjunto microeletrônico, métodos de fabricação de uma unidade de microeletrônica e de fabricação de um conjunto empilhado de unidades microeletrônicas, e, sistema. é divulgada uma unidade de microeletrônica que inclui uma estrutura de suporte com uma superfície frontal, uma superfície traseira remota em relação à superfície frontal, e um rebaixo com uma abertura na superfície frontal e uma superfície interna localizada abaixo da superfície frontal da estrutura de suporte. a unidade de microeletrônica pode incluir um elemento microeletrônico com uma superfície de base adjacente à superfície interna, uma superfície de topo remota em relação à superfície de base e uma pluralidade de contatos na superfície de topo. o elemento microeletrônico pode incluir terminais eletricamente conectados nos contatos do elemento microeletrônico. a unidade de microeletrônico pode incluir uma região dielétrica que contata pelo menos a superfície de topo do elemento microeletrônico. a região dielétrica pdoe ter uma superfície plana localizadacoplanar em relação à superfície frontal da estrutura de suporte, ou acima dela. os terminais podem ficar expostos na superfície da região dielétrica para interconexão com um elemento externo.
Abstract:
A microelectronic connection component is provided with leads having a surface wettable by a bonding material such as a solder at the tips of the leads which are intended to be bonded with microelectronic devices. The leads have non-wettable surfaces bounding the wettable surfaces. During bonding, the non-wettable surfaces confine liquid bonding material such as liquid solder and prevent the liquid bonding material from spreading along the leads.
Abstract:
A microelectronic unit 400 can include a semiconductor element 401 having a front surface, a microelectronic semiconductor device adjacent to the front surface, contacts 403 at the front surface and a rear surface remote from the front surface. The semiconductor element 401 can have through holes 410 extending from the rear surface through the semiconductor element 401 and through the contacts 403. A dielectric layer 411 can line the through holes 410. A conductive layer 412 may overlie the dielectric layer 411 within the through holes 410. The conductive layer 412 can conductively interconnect the contacts 403 with unit contacts.
Abstract:
A microelectronic component is made by providing a starting structure having a dielectric layer (22) and leads on a surface of the dielectric layer. The dielectric layer is etched to partially detach the leads (24) from the dielectric layer, leaving a portion of each lead releasably connected to the dielectric layer. Ends of the leads (24) may be connected to contacts (52) on a microelectronic element (50), such as the contacts on a semiconductor chip or wafer, before the dielectric layer (22) is etched to partially detach the leads (24) from the dielectric layer. The lead is partially detached from the dielectric layer so that the dielectric layer can be broken or peeled away from the leads during the step of moving the microelectronic element (50) and dielectric layer (22) away from one another.
Abstract:
A microelectronic unit can include a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can also include a microelectronic element having a top surface adjacent the inner surface, a bottom surface remote from the top surface, and a plurality of contacts at the top surface. The microelectronic unit can also include terminals electrically connected with the contacts of the microelectronic element. The terminals can be electrically insulated from the carrier structure. The microelectronic unit can also include a dielectric region contacting at least the bottom surface of the microelectronic element. The dielectric region can define a planar surface located coplanar with or above the front surface of the carrier structure.
Abstract:
Microelectronic package elements and packages having dielectric layers and methods of fabricating such elements packages are disclosed. The elements and packages may advantageously be used in microelectronic assemblies having high routing density.
Abstract:
Electrical connections are made between a pair of elements (32, 38) disposed on opposite side of a hole (28) extending through a dielectric layer (20) by evaporating a conductive material (40) such as a metal having high vapor pressure within the hole while maintaining the hole in a substantially sealed condition. The process may be performed simultaneously to form numerous connections within a microelectronic unit as, for example, within a multilayer circuit panel.
Abstract:
An interconnect element 130 can include a dielectric layer 116 having a top face 116b and a bottom face 116a remote from the top face, a first metal layer defining a plane extending along the bottom face and a second metal layer extending along the top face. One of the first or second metal layers, or both, can include a plurality of conductive traces 132, 134. A plurality of conductive protrusions 112 can extend upwardly from the plane defined by the first metal layer 102 through the dielectric layer 116. The conductive protrusions 112 can have top surfaces 126 at a first height 115 above the first metal layer 132 which may be more than 50% of a height of the dielectric layer. A plurality of conductive vias 128 can extend from the top surfaces 126 of the protrusions 112 to connect the protrusions 112 with the second metal layer.
Abstract:
A method of forming contacts for an interconnection element, includes (a) joining a conductive element to an interconnection element having multiple wiring layers, (b) patterning the conductive element to form conductive pins, and (c) electrically interconnecting the conductive pins with conductive features of the interconnection element. A multiple wiring layer interconnection element having an exposed pin interface, includes an interconnection element having multiple wiring layers separated by at least one dielectric layer, the wiring layers including a plurality of conductive features exposed at a first face of the interconnection element, a plurality of conductive pins protruding in a direction away from the first face, and metal features electrically interconnecting the conductive features with the conductive pins.