公开(公告)号：EP3143849B1

公开(公告)日：2019-07-03

申请号：EP15709451.7

申请日：2015-03-05

Applicant: Auto-Kabel Management GmbH ,  Tazarine, Wacim ,  Betscher, Simon ,  Gronwald, Frank ,  Rafati, Sohejl

Inventor： TAZARINE, Wacim ,  BETSCHER, Simon ,  GRONWALD, Frank ,  RAFATI, Sohejl

IPC: H05K1/14 ,  H05K1/05 ,  H05K1/02 ,  B60R16/03 ,  F02N11/08

CPC classification number: H05K1/14 ,  F02N11/0862 ,  F02N11/087 ,  F02N2011/0874 ,  F02N2250/02 ,  H05K1/0204 ,  H05K1/0263 ,  H05K1/0287 ,  H05K1/056 ,  H05K1/09 ,  H05K1/111 ,  H05K1/142 ,  H05K1/145 ,  H05K2201/04 ,  H05K2201/06 ,  H05K2201/07 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2201/10272

公开(公告)号：EP2601711A1

公开(公告)日：2013-06-12

申请号：EP11749274.4

申请日：2011-07-29

Applicant: Tyco Electronics Corporation

Inventor： BOPP, Steven Richard ,  NAY, Neil Ktul

IPC: H01R13/6469 ,  H01R107/00

CPC classification number: H01R13/6466 ,  H01R13/6461 ,  H01R13/6469 ,  H01R24/64 ,  H01R2107/00 ,  H05K1/0228 ,  H05K1/0239 ,  H05K1/11 ,  H05K2201/07 ,  H05K2201/10189

Abstract: An electrical connector (100) comprising mating conductors (116) configured to engage plug contacts and a circuit board (124) having associated pairs of input and output terminals (220, 222) and signal traces (231-238) that electrically connect the associated pairs of input and output terminals (220, 222). The input terminals (220) are communicatively coupled to the mating conductors (116, 130) and the output terminals (222) are configured to communicatively couple to cable conductors of a communication cable. Each associated pair of input and output terminals (220, 222) is electrically connected through a corresponding signal trace (231-238), and at least two signal traces (233, 235) form a broadside-coupling region (250) in which the at least two signal traces are spaced apart from one another along an orientation axis (192), and the at least two signal traces (233, 235) extend parallel to each other through the broadside-coupling region (250) for a crosstalk-reducing distance (D CRT1 ).

Abstract translation: 一种电连接器，包括具有板基板的电路板，所述基板具有相对的板表面，并且沿着在相对的板表面之间延伸的取向轴线测量的厚度。 电路板具有相关联的输入和输出端子对以及电连接相关联的输入和输出端子对的信号迹线。 所述输入和输出端子分别被配置为可通信地耦合到配合电缆导体和电缆导体。 每个相关联的输入和输出端子对通过对应的信号迹线电连接，相应的信号迹线具有沿对应的输入和输出端子之间的板基板延伸的导电路径。 至少两个信号迹线形成宽侧耦合区域，其中至少两个信号迹线的导电路径沿着取向轴线堆叠并且通过厚度间隔开并且彼此平行延伸以实现串扰减小距离。

公开(公告)号：JP6401798B2

公开(公告)日：2018-10-10

申请号：JP2016567576

申请日：2015-03-05

Applicant: アウト カーベル マネージメントゲゼルシャフト ミット ベシュレンクテル ハフツング

Inventor： ワシム ターツェリーネ ,  ジーモン ベッチャー ,  フランク グロンヴァルト ,  ゾヒジル ラファーティ

IPC: H01L23/12 ,  H01L25/07 ,  H01L25/18 ,  H02M7/04 ,  H01M10/42 ,  H05K1/02

CPC classification number: H05K1/14 ,  F02N11/0862 ,  F02N11/087 ,  F02N2011/0874 ,  F02N2250/02 ,  H05K1/0204 ,  H05K1/0263 ,  H05K1/0287 ,  H05K1/056 ,  H05K1/09 ,  H05K1/111 ,  H05K1/142 ,  H05K1/145 ,  H05K2201/04 ,  H05K2201/06 ,  H05K2201/07 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2201/10272

公开(公告)号：JP5672418B2

公开(公告)日：2015-02-18

申请号：JP2014528354

申请日：2013-09-03

Applicant: 株式会社村田製作所

Inventor： 伸郎 池本 ,  伸郎 池本 ,  祐貴 若林 ,  祐貴 若林 ,  茂 多胡 ,  茂 多胡

IPC: H01P3/08

CPC classification number: H01P3/082 ,  H01P3/08 ,  H01P11/003 ,  H01R12/62 ,  H01R24/50 ,  H01R2103/00 ,  H05K1/0219 ,  H05K1/0225 ,  H05K1/024 ,  H05K1/0242 ,  H05K1/0253 ,  H05K1/115 ,  H05K1/118 ,  H05K1/147 ,  H05K3/0052 ,  H05K3/363 ,  H05K3/4623 ,  H05K3/4632 ,  H05K2201/07 ,  H05K2201/09154 ,  H05K2201/0919 ,  H05K2201/09481 ,  H05K2201/09527 ,  H05K2201/096 ,  H05K2201/09618 ,  H05K2201/097 ,  H05K2201/09845 ,  H05K2201/10037 ,  H05K2201/10204 ,  Y10T29/49016

公开(公告)号：US12016115B2

公开(公告)日：2024-06-18

申请号：US17956999

申请日：2022-09-30

Applicant: SHENNAN CIRCUITS CO., LTD.

Inventor： Beilei Wang ,  Weijing Guo ,  Zhanhao Xie

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/10

CPC classification number: H05K1/0263 ,  H05K1/113 ,  H05K3/103 ,  H05K2201/0355 ,  H05K2201/07 ,  H05K2201/08

Abstract: Disclosed are an embedded circuit board and a fabrication method therefor. The embedded circuit board comprises: a circuit board body; signal transmission layers (1200), wherein the signal transmission layers are arranged on two opposite sides of the circuit board body; bonding layers, wherein the bonding layers are arranged between at least one signal transmission layer and the circuit board body and used for bonding the signal transmission layer to the circuit board body; metal bases which are embedded in the circuit board body and are electrically connected to the signal transmission layers on two opposite sides of the circuit board body; conductive parts which are arranged at the positions in the bonding layers corresponding to the metal bases, and are electrically connected to the signal transmission layer and the metal bases; and magnetic cores embedded in the circuit board body.

公开(公告)号：US11974396B2

公开(公告)日：2024-04-30

申请号：US17074086

申请日：2020-10-19

Applicant: Advanced American Technologies, LLC

Inventor： Robert E. Grigsby

IPC: H05K1/03 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K1/0353 ,  H05K1/0203 ,  H05K1/0275 ,  H05K1/181 ,  H05K2201/07

Abstract: A system has a printed circuit board (PCB) comprising one or more electrical and/or electronic components and a composite material comprising highly-complex resin systems and thermally-resistant solids, the composite material adhered to the PCB and encasing the one or more electrical or electronic components.

公开(公告)号：US09775231B2

公开(公告)日：2017-09-26

申请号：US14947091

申请日：2015-11-20

Applicant: Amphenol Corporation

Inventor： Marc B. Cartier, Jr.

IPC: H05K1/02 ,  H05K3/00 ,  H05K3/40 ,  H05K1/11 ,  H01R43/20

CPC classification number: H05K1/0222 ,  H01R43/205 ,  H05K1/0216 ,  H05K1/0219 ,  H05K1/025 ,  H05K1/0251 ,  H05K1/0253 ,  H05K1/0298 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/4038 ,  H05K3/429 ,  H05K2201/07 ,  H05K2201/09063 ,  H05K2201/09318 ,  H05K2201/09545 ,  H05K2201/096 ,  H05K2201/097 ,  H05K2201/09718 ,  H05K2201/09845 ,  H05K2201/09854 ,  H05K2201/10189

Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns comprising: dual diameter first and second signal vias forming a differential signal pair, the first and second signal vias being configured to accept contact tails of signal conductors of a connector; dual diameter ground shadow vias adjacent to each of the first and second signal vias, wherein the dual diameter shadow ground vias have a reversed diameter configuration with respect to the dual diameter first and second signal vias; and ground vias configured to accept contact tails of ground conductors of the connector.

公开(公告)号：US20170223823A1

公开(公告)日：2017-08-03

申请号：US15483999

申请日：2017-04-10

Applicant: FUJITSU LIMITED

Inventor： Yasuo HIDAKA

IPC: H05K1/02 ,  H01P3/08 ,  H05K3/10 ,  H05K1/03 ,  H05K3/46

CPC classification number: H05K1/0245 ,  H01P3/08 ,  H05K1/024 ,  H05K1/0248 ,  H05K1/0313 ,  H05K1/0366 ,  H05K1/038 ,  H05K3/0091 ,  H05K3/10 ,  H05K3/4644 ,  H05K2201/0183 ,  H05K2201/07 ,  H05K2203/0195

Abstract: A circuit may be configured to reduce electrical signal degradation. The circuit may include a first trace and a second trace that may be broadside coupled between a first ground plane and a second ground plane. The first and second traces may be configured to carry first and second signals, respectively, of a differential signal. The circuit may also include a first dielectric material disposed between the first trace and the second trace. Further, the circuit may include a second dielectric material disposed between the first trace and the first ground plane and disposed between the second trace and the second ground plane. A difference between a first dielectric constant of the first dielectric material and a second dielectric constant of the second dielectric material may suppress a mode conversion of the differential signal from a differential mode to a common mode.

公开(公告)号：US20130225011A1

公开(公告)日：2013-08-29

申请号：US13864043

申请日：2013-04-16

Applicant: Tyco Electronics Corporation

Inventor： Steven Richard Bopp ,  Neil Ktul Nay

IPC: H01R13/6461

CPC classification number: H01R13/6466 ,  H01R13/6461 ,  H01R13/6469 ,  H01R24/64 ,  H01R2107/00 ,  H05K1/0228 ,  H05K1/0239 ,  H05K1/11 ,  H05K2201/07 ,  H05K2201/10189

Abstract: An electrical connector that includes a circuit board having a board substrate that has opposite board surfaces and a thickness measured along an orientation axis that extends between the opposite board surfaces. The circuit board has associated pairs of input and output terminals and signal traces that electrically connect the associated pairs of input and output terminals. The input and output terminals being configured to communicatively coupled to mating and cable conductors, respectively. Each associated pair of input and output terminals is electrically connected through a corresponding signal trace that has a conductive path extending along the board substrate between the corresponding input and output terminals. At least two signal traces form a broadside-coupling region in which the conductive paths of the at least two signal traces are stacked along the orientation axis and spaced apart through the thickness and extend parallel to each other for a crosstalk-reducing distance.

Abstract translation: 一种电连接器，包括具有板基板的电路板，该基板具有相对的板表面，并且沿着在相对的板表面之间延伸的取向轴线测量的厚度。 电路板具有相关联的输入和输出端子对以及电连接相关联的输入和输出端子对的信号迹线。 输入和输出端子分别被配置为可通信地耦合到配合电缆导体和电缆导体。 每个相关联的输入和输出端子对通过相应的信号迹线电连接，该对应的信号迹线具有沿对应的输入和输出端子之间的板基板延伸的导电路径。 至少两个信号迹线形成宽侧耦合区域，其中至少两个信号迹线的导电路径沿着取向轴线堆叠并且间隔开厚度并且彼此平行延伸以减少串扰减小距离。

公开(公告)号：US08435082B2

公开(公告)日：2013-05-07

申请号：US12849593

申请日：2010-08-03

Applicant: Steven Richard Bopp ,  Neil Ktul Nay

Inventor： Steven Richard Bopp ,  Neil Ktul Nay

IPC: H01R24/00

CPC classification number: H01R13/6466 ,  H01R13/6461 ,  H01R13/6469 ,  H01R24/64 ,  H01R2107/00 ,  H05K1/0228 ,  H05K1/0239 ,  H05K1/11 ,  H05K2201/07 ,  H05K2201/10189

Abstract: An electrical connector that includes a circuit board having a board substrate that has opposite board surfaces and a thickness measured along an orientation axis that extends between the opposite board surfaces. The circuit board has associated pairs of input and output terminals and signal traces that electrically connect the associated pairs of input and output terminals. The input and output terminals being configured to communicatively coupled to mating and cable conductors, respectively. Each associated pair of input and output terminals is electrically connected through a corresponding signal trace that has a conductive path extending along the board substrate between the corresponding input and output terminals. At least two signal traces form a broadside-coupling region in which the conductive paths of the at least two signal traces are stacked along the orientation axis and spaced apart through the thickness and extend parallel to each other for a crosstalk-reducing distance.