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    POWER ELECTRONIC DEVICE OF MULTI-DRAIN TYPE INTEGRATED ON A SEMICONDUCTOR SUBSTRATE AND RELATIVE MANUFACTURING PROCESS
    204.
    发明授权
    POWER ELECTRONIC DEVICE OF MULTI-DRAIN TYPE INTEGRATED ON A SEMICONDUCTOR SUBSTRATE AND RELATIVE MANUFACTURING PROCESS 有权
    在HALF-线路基板及相关制造工艺多漏式电子电子元器件性能

    公开(公告)号：EP1851804B1

    公开(公告)日：2010-08-04

    申请号：EP06723076.3

    申请日：2006-02-22

    Applicant: STMicroelectronics Srl

    Inventor： SAGGIO, Mario, Giuseppe ,  FRISINA, Ferruccio

    IPC: H01L29/78 ,  H01L29/36 ,  H01L29/10 ,  H01L29/08 ,  H01L21/336

    CPC classification number: H01L29/66712 ,  H01L29/0634 ,  H01L29/0847 ,  H01L29/1095

    Abstract: Power semiconductor device (30) integrated on a semiconductor substrate (100) of a first type of conductivity comprising a plurality of elemental units, each elemental unit comprising a body region (40) of a second type of conductivity realised on a semiconductor layer (20) of the first type of conductivity formed on the semiconductor substrate (100), and a column region (50) of the first type of conductivity realised in said semiconductor layer (20) below the body region (40), wherein the semiconductor layer (20) comprises a plurality of semiconductor layers (21, 22, 23, 24), overlying each other, the resistivity of each layer being different from that of the other layers, and wherein said column region (50) comprises a plurality of doped sub-regions (51, 52, 53, 54), each realised in one of said semiconductor layers (21, 22, 23, 24), wherein the amount of charge of each doped sub-regions (51, 52, 53, 54) balances the amount of charge of the semiconductor layer (21, 22, 23, 24).

    Method of storing an indication of whether a memory location in phase change memory needs programming
    206.
    发明公开
    Method of storing an indication of whether a memory location in phase change memory needs programming 审中-公开
    一种用于存储是否在相变存储器的存储位置的指示方法需要一种编程

    公开(公告)号：EP2204815A1

    公开(公告)日：2010-07-07

    申请号：EP09180925.1

    申请日：2009-12-30

    Applicant: STMicroelectronics Srl

    Inventor： Wu, Patrick ,  Fackenthal, Richard ,  Bedeschi, Ferdinando ,  Jagasivamani, Meenatchi ,  Donze', Enzo Michele

    IPC: G11C16/02

    CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C13/0064 ,  G11C2013/0076

    Abstract: A phase change memory includes a float buffer which stores the result of a comparison between the current state of data in the phase change memory cells and an intended next state of each of those cells. The float buffer indicates which cells need to be programmed in order to achieve the new states and which cells happen to already be in the new states. Then, after programming of the cells, the float buffer indicates which cells still need to be programmed. Thus, a control stage uses the information in the float buffer to program only those cells whose states need to be changed.

    Abstract translation: 一种相变存储器包括存储在相变存储器单元中的数据的当前状态之间和每一那些细胞的预期的下一个状态的比较结果float缓冲区。 浮动缓冲指示哪些细胞需要，以实现新的状态和细胞发生已经在新州进行编程。 然后，将细胞的编程后，浮缓冲指示哪些细胞仍然需要进行编程。 因此，控制阶段使用在浮子缓冲器中的信息来唯一的那些细胞其状态需要改变编程。

    Integrated programmable gain amplifier circuit and system including said circuit
    207.
    发明公开
    Integrated programmable gain amplifier circuit and system including said circuit 审中-公开
    带增益和progammierbarer系统集成放大器包含放大器

    公开(公告)号：EP2197109A1

    公开(公告)日：2010-06-16

    申请号：EP09179092.3

    申请日：2009-12-14

    Applicant: STMicroelectronics Srl

    Inventor： Nicollini, Germano ,  Nagari, Angelo

    IPC: H03H11/12 ,  H03G1/00

    CPC classification number: H03G1/0088 ,  H03F3/45475 ,  H03F2203/45526 ,  H03F2203/45594 ,  H03H11/126 ,  H03H11/1291

    Abstract: An integrated programmable gain amplifier circuit (22), for receiving, at input, an analog signal (S MC ), including an operational amplifier (33) and a gain setup network (NRC IN , NRC F ) including resistive elements (R 1 -R 4 , Rf 1 -Rf n ) and selection elements (S 1 -S n ), which may be controlled in order to setup the gain of said amplifier circuit (22), is described.
    The gain setup network (NRC IN , NRC F ) further includes capacitive elements (C1-C3, Cf 1 -Cf n ), for defining, together with the resistive elements (R 1 -R 4 ) and the operational amplifier (33), an anti-aliasing filter of the active RC type.

    Abstract translation: 用于接收，在输入到模拟信号（S MC），包括运算放大器（33）和一个增益setupnetwork（NRC IN，NRC F）包括电阻元件（R 1集成的可编程增益放大器电路（22） - R 4，RF 1射频S）和选择元件（S 1 -S n），其可以以被控制，以设定所述放大电路的增益（22）进行说明。 增益setupnetwork（NRC IN，NRC F）还包括：电容元件（C1-C3，CF 1为-CF n）时，为限定，与所述电阻元件（R 1 -R 4）和运算放大器（33）一起， 的抗混叠的有源RC类型的过滤器。

    Method of improving noise characteristics of an ADPLL and a relative ADPLL
    208.
    发明公开
    Method of improving noise characteristics of an ADPLL and a relative ADPLL 有权
    用于改善的全数字锁相环的噪声特性（ADPLL）和相对ADPLL

    公开(公告)号：EP2194646A1

    公开(公告)日：2010-06-09

    申请号：EP09177501.5

    申请日：2009-11-30

    Applicant: STMicroelectronics Srl

    Inventor： Weltin-Wu, Colin ,  Temporiti Milani, Enrico Stefano ,  Baldi, Daniele

    IPC: H03L7/099

    CPC classification number: H03L7/0991 ,  H03L2207/50

    Abstract: A method of improving noise characteristics of an all-digital phase locked loop generating a feedback word representing a continuous-time oscillating signal, including a time-to-digital converter input with the continuous-time oscillating signal and a reference signal function of a reference clock, the time-to-digital converter generating a digital word representing either the ratio between the oscillating signal and the reference signal or the DCO output phase, the feedback word being a function of said digital word, comprises the step of corrupting with a dither signal at least one among the reference clock, the digital word and the oscillating signal.
    This method is implemented by a respective feedback circuit for an all-digital phase locked loop.

    Abstract translation: 改进的全数字相位的噪声特性的方法，锁相环产生表示连续时间振荡信号的反馈字，包括与连续时间振荡信号的时间 - 数字转换器的输入和基准的基准信号的功能 时钟，时间 - 数字转换器产生代表无论振荡信号和所述基准信号或所述DCO输出相之间的比例的数字字，所述反馈字是所述数字字的一个功能，包括腐败与抖动的步骤 信号的基准时钟，数字字和所述振荡信号中的至少一个。 此方法由一个respectivement反馈电路来实现用于全数字锁相环。

    Uniaxial or biaxial microelectromechanical gyroscope with improved sensitivity to angular velocity detection
    210.
    发明公开
    Uniaxial or biaxial microelectromechanical gyroscope with improved sensitivity to angular velocity detection 审中-公开
    Einachsiges oder zweiachsiges mikroelektromechanisches Gyroskop mit verbesserter Empfindlichkeit der Winkelgeschwindigkeitsdetektion

    公开(公告)号：EP2192383A1

    公开(公告)日：2010-06-02

    申请号：EP09177122.0

    申请日：2009-11-25

    Applicant: STMicroelectronics Srl

    Inventor： Coronato, Luca ,  Cazzaniga, Gabriele ,  Zerbini, Sarah

    IPC: G01C19/56

    CPC classification number: G01C19/5712

    Abstract: Described herein is an integrated microelectromechanical structure (30), provided with: a driving mass (3), anchored to a substrate (2) via elastic anchorage elements (8a, 8b) and moved in a plane (xy) with a driving movement; and a first sensing mass (16a'), suspended inside, and coupled to, the driving mass via elastic supporting elements (20') so as to be fixed with respect to the driving mass (3) in the driving movement and to perform a detection movement of rotation out of the plane (xy) in response to a first angular velocity (Ω x ); the elastic anchorage elements (8a, 8b) and the elastic supporting elements (20') cause the detection movement to be decoupled from the driving movement. The elastic supporting elements are coupled to the first sensing mass (16a') at an end portion (31; 31') thereof, and the axis of rotation of the detection movement extends, within the first sensing mass, only through the aforesaid end portion.

    Abstract translation: 本文描述的是集成的微机电结构（30），其设置有驱动质量块（3），通过弹性锚固元件（8a，8b）锚固到基底（2）并且在驱动运动的平面（xy）中移动; 以及第一感测质量块（16a'），其通过弹性支撑元件（20'）悬挂在驱动质量块内并且联接到驱动质量块，以便在驱动运动中相对于驱动质量块（3）固定，并执行 响应于第一角速度（x x）检测旋转出平面的运动（xy）; 弹性锚固元件（8a，8b）和弹性支撑元件（20'）使检测运动与驱动运动分离。 弹性支撑元件在其端部（31; 31'）处联接到第一感测块（16a'），并且检测运动的旋转轴线在第一感测质量块内仅延伸通过前述端部 。

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