公开(公告)号：EP1884968A1

公开(公告)日：2008-02-06

申请号：EP06732459.0

申请日：2006-04-28

Applicant: Mitsui Mining & Smelting Co., Ltd

Inventor： ABE, Naohiko c/o MITSUI MINING & SMELTING CO., LTD ,  SUGIOKA, Akiko c/o MITSUI MINING & SMELTING CO., LTD ,  KANNO, Akihiro c/o MITSUI MINING & SMELTING CO., LTD ,  NAKASHIMA, Hirotake c/o MITSUI MINING & SMELTING CO., LTD

IPC: H01G4/33 ,  H01G13/00

CPC classification number: H05K1/162 ,  H01G4/1209 ,  H01G4/206 ,  H01G4/33 ,  H05K2201/0175 ,  H05K2203/1147 ,  Y10T428/265 ,  Y10T428/266

Abstract: An object of the present invention is to provide a material for forming a capacitor layer comprising a dielectric layer formed by any one of a sol-gel method, an MOCVD method, and a sputtering deposition method. The material can reduce a leakage current of a capacitor circuit. In order to achieve the object, a material for forming a capacitor layer comprising a dielectric layer between a first conductive layer to be used for forming a top electrode and a second conductive layer to be used for forming a bottom electrode, characterized in that the dielectric layer is a dielectric oxide film formed by any one of a sol-gel method, an MOCVD method, and a sputtering deposition method; and particles constituting the dielectric oxide film are impregnated with a resin component is employed. In addition, a manufacturing method characterized in that the dielectric oxide film is formed on the surface of a material to be the bottom electrode by any one of a sol-gel method, an MOCVD method, and a sputtering deposition method; a resin varnish is impregnated into a surface of the dielectric oxide film; the resin is dried and cured to form the dielectric layer; and then a top electrode constituting layer is provided on the dielectric layer is employed.

Abstract translation: 本发明的目的是提供一种用于形成电容器层的材料，其包括通过溶胶 - 凝胶法，MOCVD法和溅射沉积法中的任何一种形成的电介质层。 该材料可以减少电容器电路的漏电流。 为了实现该目的，用于形成电容器层的材料包括在用于形成顶部电极的第一导电层和用于形成底部电极的第二导电层之间的电介质层，其特征在于，所述电介质层 层是通过溶胶 - 凝胶法，MOCVD法和溅射沉积法中的任一种形成的电介质氧化物膜; 并且使用构成电介质氧化膜的颗粒用树脂组分浸渍。 另外，一种制造方法，其特征在于，通过溶胶 - 凝胶法，MOCVD法和溅射沉积法中的任何一种，在作为底部电极的材料的表面上形成电介质氧化物膜; 将树脂清漆浸渍在电介质氧化膜的表面上; 树脂被干燥并固化以形成电介质层; 然后在电介质层上设置顶电极构成层。

公开(公告)号：EP1589798A4

公开(公告)日：2007-11-28

申请号：EP03815594

申请日：2003-01-31

Applicant: FUJITSU LTD

Inventor： KOYAMA HIDEKI

IPC: H01L23/498 ,  H01P3/08 ,  H05K1/11 ,  H05K1/16 ,  H05K3/42 ,  H05K3/46 ,  H01L23/12

CPC classification number: H01L23/49822 ,  H01L23/50 ,  H01L2224/16 ,  H01L2924/09701 ,  H01L2924/3011 ,  H01P3/088 ,  H05K1/0298 ,  H05K1/112 ,  H05K1/115 ,  H05K1/162 ,  H05K3/429 ,  H05K3/4641 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/10674

Abstract: A multilayer printed board comprising a plurality of capacitive coupling layers (6) each consisting of a dielectric layer (4) and a power supply layer (3) and a ground layer (5) facing each other while sandwiching the dielectric layer (4), first vias (7) connecting between the power supply layers (3) included in the plurality of capacitive coupling layers (6), and second vias (8) connecting between the ground layers (5) included in the plurality of capacitive coupling layers (6).

公开(公告)号：EP1770725A2

公开(公告)日：2007-04-04

申请号：EP06015838.3

申请日：2006-07-28

Applicant: TDK Corporation

Inventor： Uchida, Kiyoshi ,  Horino, Kenji ,  Saita, Hitoshi

IPC: H01G4/12 ,  H05K1/16

CPC classification number: H01L21/02197 ,  H01G4/1227 ,  H01L21/02356 ,  H01L21/31691 ,  H01L27/016 ,  H05K1/162 ,  H05K2201/0175 ,  H05K2201/0355

Abstract: A capacitor provided with a dielectric film, and a first electrode and second electrode formed sandwiching it and facing each other, wherein the dielectric film has a density exceeding 72% of the theoretical density calculated based on the lattice constant, and either or both of said first electrode and said second electrode contain at least one metal selected from the group consisting of Cu, Ni, Al, stainless steel and inconel.

Abstract translation: 设置有电介质膜的电容器和夹在其中且彼此面对的形成的第一电极和第二电极，其中所述电介质膜的密度超过基于晶格常数计算的理论密度的72％，并且所述 第一电极和第二电极含有选自Cu，Ni，Al，不锈钢和铬镍铁合金中的至少一种金属。

公开(公告)号：EP1764810A1

公开(公告)日：2007-03-21

申请号：EP06012013.6

申请日：2006-06-12

Applicant: E.I. Du Pont de Nemours & Company

Inventor： Suh, Seigi ,  Borland, William, J.

IPC: H01G4/12 ,  H05K1/16

CPC classification number: H01L21/02197 ,  H01G4/1227 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/31691 ,  H01L28/55 ,  H05K1/162 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0355

Abstract: The present invention is directed to a dielectric thin film composition comprising: (1) one or more barium/titanium-containing additives selected from (a) barium titanate, (b) any composition that can form barium titanate during firing, and (c) mixtures thereof; dissolved in (2) organic medium; and wherein said thin film composition is doped with 0.002 - 0.05 atom percent of a dopant comprising an element selected from Sc, Cr, Fe, Co, Ni, Ca, Zn, Al, Ga, Y, Nd, Sm, Eu, Gd, Dy, Ho, Er, Yb, Lu and mixtures thereof and to capacitors comprising such compositions.

Abstract translation: 本发明涉及一种电介质薄膜组合物，包括：（1）一种或多种钡/选自（a）钛酸钡选择的添加剂，（b）中的任何组合物做了在烧制过程中可以形成的钛酸钡，以及含钛的（c）中 它们的混合物; 溶解于（2）有机介质; 和worin所述薄膜组合物掺杂有0002 - 掺杂剂包括选自Sc，铬，铁，钴，镍，钙，锌，铝，镓，Y，钕，钐，铕，钆选择的元素中的00:05％（原子）， 镝，钬，铒，镱，卢及其混合物和电容器，包括寻求创作。

公开(公告)号：EP1699080A1

公开(公告)日：2006-09-06

申请号：EP06110654.8

申请日：2006-03-03

Applicant: Dowa Mining Co., Ltd.

Inventor： Itahana, Yoshiharu ,  Nakamura, Junji ,  Sawabe, Akio

IPC: H01L23/373 ,  H05K3/38

CPC classification number: H01L23/3735 ,  H01L23/5386 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0306 ,  H05K3/38 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09109 ,  H05K2203/0545 ,  Y10T428/12535 ,  Y10T428/12576 ,  Y10T428/12611 ,  Y10T428/24917 ,  Y10T428/24926 ,  H01L2924/00

Abstract: A ceramic circuit substrate and a manufacturing method thereof are provided, which has excellent thermal shock tolerance by forming a gap between a circuit pattern section and a ceramic substrate, and has a capability to prevent etchant residue from remaining therein. The ceramic circuit substrate according to the present invention includes patterns of brazing material 8 and 9 formed on the ceramic substrate, a circuit pattern section jointed onto the pattern of brazing material; wherein the pattern of brazing material includes a line pattern along the edge of the circuit pattern, and a gap is formed within the line pattern located between the ceramic substrate and the circuit pattern.

Abstract translation: 提供一种陶瓷电路基板及其制造方法，其通过在电路图案部和陶瓷基板之间形成间隙而具有优异的耐热冲击性，并且具有防止蚀刻残渣残留的能力。 根据本发明的陶瓷电路基板包括形成在陶瓷基板上的钎焊材料8和9的图案，连接到钎焊材料图案上的电路图形部分; 其中钎焊材料的图案包括沿电路图案的边缘的线图案，并且在位于陶瓷基板和电路图案之间的线图案内形成间隙。

公开(公告)号：EP1696716A1

公开(公告)日：2006-08-30

申请号：EP04801674.5

申请日：2004-12-06

Applicant: IBIDEN CO., LTD.

Inventor： KARIYA, Takashi ,  MOCHIDA, Akira

IPC: H05K3/46

CPC classification number: H05K1/162 ,  H05K1/0231 ,  H05K1/0271 ,  H05K1/113 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2201/10522 ,  H05K2201/10734

Abstract: A multilayer printed wiring board 10 includes: a mounting portion 60 on the top surface of which is mounted a semiconductor element that is electrically connected to a wiring pattern 32, etc.; and a capacitor portion 40 having a high dielectric constant layer 43, formed of ceramic and first and second layer electrodes 41 and 42 that sandwich the high dielectric constant layer 43. One of either of the first and second layer electrodes 41 and 42 is connected to a power supply line of the semiconductor element and the other of either of the first and second layer electrodes 41 and 42 is connected to a ground line. In this multilayer printed wiring board 10, high dielectric constant layer 43 included in the layered capacitor portion 40, which is connected between the power supply line and the ground line, is formed of ceramic. With this structure, the static capacitance of the layered capacitor portion 40 can be high, and an adequate decoupling effect is exhibited even under circumstances in which instantaneous potential drops occur readily.

Abstract translation: 多层印刷线路板10包括：安装部分60，其上表面上安装有与布线图案32等电连接的半导体元件; 以及具有由陶瓷形成的高介电常数层43的电容器部分40以及夹持高介电常数层43的第一和第二层电极41和42.第一和第二层电极41和42之一连接到 半导体元件的电源线以及第一和第二层电极41和42中的任一个的另一个连接到地线。 在该多层印刷线路板10中，连接在电源线和接地线之间的层状电容器部分40中包含的高介电常数层43由陶瓷形成。 利用这种结构，层状电容器部分40的静态电容可以很高，并且即使在容易发生瞬时电位下降的情况下也表现出适当的去耦合效果。

公开(公告)号：EP1578543A2

公开(公告)日：2005-09-28

申请号：EP03814859.9

申请日：2003-12-18

Applicant: MOTOROLA, INC.

Inventor： CROSWELL, Robert ,  SAVIC, Jovica ,  TUNGARE, Aroon ,  KIM, Taeyun ,  KINGON, Angus, Ian ,  MARIA, Jon-Paul

IPC: B05D5/12

CPC classification number: H01G4/018 ,  C23C26/00 ,  C23C28/321 ,  C23C28/322 ,  C23C28/345 ,  C23C28/3455 ,  H01G4/12 ,  H05K1/162 ,  H05K3/388 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2203/1545

Abstract: Thin film ceramic foil capacitors are produced using inline reel-to-reel processing techniques by starting (100) with a length of copper foil which serves as one plate of the capacitor, then depositing (120) a layer of a ceramic precursor on a portion of one side of the copper foil at a first station. The foil is advanced (117, 127, 137, 147) to the next station where the ceramic precursor and the copper foil are heated (130) to remove any carrier solvents or vehicles, then pyrolyzed (140) to remove any residual organic materials. It is then sintered (150) at high temperatures to convert the ceramic to polycrystalline ceramic. A final top metal layer is then deposited (160) on the polycrystalline ceramic to form the other plate of the capacitor

公开(公告)号：EP1250031A2

公开(公告)日：2002-10-16

申请号：EP02252573.7

申请日：2002-04-10

Applicant: NGK INSULATORS, LTD.

Inventor： Ikeda, Koji, NGK Insulators Ltd. I.P.D. ,  Shibata, Kazuyoshi, NGK Insulators Ltd. I.P.D.

IPC: H05K1/16 ,  H05K3/46 ,  H01L41/047 ,  H01L41/24

CPC classification number: H05K3/38 ,  H01L41/047 ,  H01L41/0471 ,  H01L41/0477 ,  H01L41/094 ,  H01L41/273 ,  H01L41/29 ,  H01L41/314 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K1/16 ,  H05K3/4667 ,  H05K2201/0175 ,  H05K2201/09881 ,  H05K2201/10083 ,  H01L2924/00

Abstract: A wiring board (110A) has a ceramic substrate (112) and a first wiring pattern (114) disposed on it, gaps (120) of the wiring pattern being filled with a cermet insulating layer (122). There may be a piezoelectric/electrostrictive layer (116) and a cermet second wiring pattern (118) successively.
In a method, a first cermet layer (130) to be the first wiring pattern (114) and a second cermet layer (132) to be the insulating layer (122) filling gaps (120) in the first wiring pattern (114) are formed on a ceramic substrate (112). Thereafter, the first cermet layer (130) and the second cermet layer (132) are fired to product the first wiring pattern (114) and the insulating layer (122) simultaneously. Then, a PZT paste (134) may be formed and thereafter fired to produce the piezoelectric/electrostrictive layer (116). Thereafter, a third cermet layer (136) may be formed and thereafter fired to produce the second wiring pattern (118).

Abstract translation: 该基板包括陶瓷基板（112）和布置在基板上作为电极层的布线图案（114）。 布线图案具有填充有由金属陶瓷制成的绝缘层（122）的间隙（120）。 金属陶瓷层包含电极层的材料。 还包括以下独立权利要求：（a）制造布线板的方法。

公开(公告)号：EP1204697A1

公开(公告)日：2002-05-15

申请号：EP00950805.2

申请日：2000-07-28

Applicant: PPG Industries Ohio, Inc.

Inventor： NOVICH, Bruce, E. ,  LAMMON-HILINSKI, Kami ,  ROBERTSON, Walter, J. ,  WU, Xiang ,  VELPARI, Vedagiri ,  LAWTON, Ernest, L. ,  RICE, William, B.

IPC: C08J5/08 ,  H05K1/03 ,  C03C25/10

CPC classification number: C03C25/10 ,  C03C25/00 ,  C03C25/47 ,  C03C25/48 ,  C08J5/08 ,  H05K1/0366 ,  H05K3/0047 ,  H05K2201/0166 ,  H05K2201/0175 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0239 ,  H05K2201/0245 ,  H05K2201/0254 ,  H05K2201/029 ,  H05K2203/127

Abstract: The present invention provides an at least partially coated fiber strand comprising a plurality of glass fibers having a resin compatible coating composition on at least a portion of a surface of at least one of said glass fibers, the resin compatible coating composition comprising: (a) a plurality of lamellar, inorganic particles and (b) at least one polymeric material. The present invention further provides that the resin compatible coating composition comprises (a) a plurality of discrete particles formed from materials selected from non-heat expandable organic materials, inorganic polymeric materials, non-heat expandable composite materials and mixtures thereof, the particles having an average particle size sufficient to allow strand wet out; (b) at least one lubricious material different from said plurality of discrete particles; and (c) at least one film-forming material. The present invention further provides that the resin compatible coating composition comprises (a) a plurality of hollow, non-heat expandable organicparticles; and (b) at least one lubricious material different from the at least one hollow organic particle.

公开(公告)号：EP1060141A1

公开(公告)日：2000-12-20

申请号：EP99908438.7

申请日：1999-02-25

Applicant: PPG Industries Ohio, Inc.

Inventor： NOVICH, Bruce ,  ROBERTSON, Walter, J.

IPC: C03C25/02 ,  C08J5/08 ,  H05K1/03

CPC classification number: H05K1/0366 ,  C03C25/26 ,  C03C25/42 ,  C03C25/47 ,  C08J5/08 ,  H05K3/0047 ,  H05K2201/0175 ,  H05K2201/0209 ,  H05K2201/0239 ,  H05K2201/0245 ,  H05K2201/0248 ,  H05K2201/0254 ,  H05K2203/127

Abstract: The present invention provides glass fiber strands impregnated with non-abrasive solid particles which provide interstitial spaces of at least 3 micrometers between adjacent fibers within a strand which are useful for reinforcing composites.