公开(公告)号：EP0615290A2

公开(公告)日：1994-09-14

申请号：EP94102227.9

申请日：1994-02-14

Applicant: International Business Machines Corporation

Inventor： Deutsch, Alina ,  Lewis, David Andrew ,  Narayan. Chandrasekhar ,  Plachy,Anthony Louis

IPC: H01L23/538 ,  H01L23/64

CPC classification number: H01L23/5385 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0216 ,  H05K1/0289 ,  H05K1/111 ,  H05K3/4614 ,  H05K2201/0373 ,  H05K2201/0792 ,  H05K2201/0939 ,  H05K2201/09427 ,  H05K2201/10719 ,  H05K2203/061 ,  Y02P70/611 ,  H01L2924/00

Abstract: Electrical interconnection structures are described. The electrical interconnection structures are formed by electrically interconnecting in a stack a plurality of discrete substrates (22, 24). By using a plurality of discrete substrates, a multilayer dielectric/electrical conductor structure can be fabricated from individual discrete substrates each of which can be tested prior to forming a composite stack so that defects in each discrete substrate can be eliminated before inclusion into the stack. Electrical interconnection between adjacent substrate is provided by an array of contact locations on each surface of the adjacent substrates. Corresponding contacts on adjacent substrates are adapted for mutual electrical engagement. Adjacent contact locations can be thermocompression bonded. To reduce the parasitic capacitance and coupled noise between the contact pads (26) the electrical conductors within the interior of each discrete substrate, the contact pads on each substrate have elongated shape. The elongated contact pads or lattice pads on adjacent substrates are nonparallel and preferably orthogonal so that the corresponding pads of adjacent substrates electrically interconnect an intersecting area which varies in location along the elongated contact pads as the placement of the adjacent substrates varies in the manufacture thereof.

Abstract translation: 描述电互连结构。 电互连结构通过在堆叠中电互连多个分立基板（22,24）而形成。 通过使用多个不连续的衬底，可以由各个不连续的衬底制造多层电介质/电导体结构，其中每个衬底都可以在形成复合叠层之前进行测试，从而可以在包含到叠层中之前消除每个离散衬底中的缺陷。 相邻基板之间的电互连由相邻基板的每个表面上的接触位置阵列提供。 相邻衬底上的相应触点适于相互电接合。 相邻的接触位置可以热压接。 为了降低每个分立衬底内部的导电接触垫（26）之间的寄生电容和耦合噪声，每个衬底上的接触垫具有细长的形状。 相邻基板上的细长接触垫或网格垫不平行，并且最好是正交的，这样当相邻基板的位置在其制造过程中变化时，相邻基板的相应垫电互连沿着细长接触垫变化的交叉区域。

公开(公告)号：EP0568087A2

公开(公告)日：1993-11-03

申请号：EP93107049.4

申请日：1993-04-30

Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA

Inventor： Ishii, Hideki, c/o Mitsubishi Denki K.K.

IPC: H05K3/34

CPC classification number: H05K3/3452 ,  B23K1/0016 ,  B23K1/20 ,  H05K1/117 ,  H05K3/3405 ,  H05K3/3463 ,  H05K2201/0373 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/099 ,  H05K2203/043 ,  H05K2203/047

Abstract: A process for reflow mounting an electronic component comprises the steps of coating the terminal electrode with a second solder having a second melting point higher than the reflow temperature, placing the mounting board, with the electronic component placed on the mounting land, on a conveyor which may be brought into contact with the second solder on the terminal electrode. The terminal electrode may be coated with a solder repelling material at a selected dividing area effective for dividing the terminal electrode into a plurality of sections substantially isolated from each other in terms of a flow of a solder. Alternatively, a mounting jig may be used for supporting the mounting board without bringing the second solder on the terminal electrode into contact with the mounting jig.

Abstract translation: 一种用于回流安装电子部件的方法包括以下步骤：用具有比回流温度高的第二熔点的第二焊料涂覆端子电极，将安装板放置在安装台面上的电子部件放置在传送带上 可以与端子电极上的第二焊料接触。 端子电极可以在选择的分割区域上涂覆有排斥材料，其有效地将端子电极分成在焊料流动方面彼此基本隔离的多个部分。 或者，可以使用安装夹具来支撑安装板，而不会使端子电极上的第二焊料与安装夹具接触。

公开(公告)号：EP0508946A1

公开(公告)日：1992-10-14

申请号：EP92810184.9

申请日：1992-03-12

Applicant: Dyconex AG

Inventor： Schmidt, Walter, Dr. ,  Martinelli, Marco

IPC: B32B15/08 ,  H05K3/38

CPC classification number: B32B15/08 ,  B29C37/0082 ,  B32B3/30 ,  B32B2311/12 ,  B32B2457/08 ,  C23F1/02 ,  H05K1/056 ,  H05K3/064 ,  H05K3/383 ,  H05K3/384 ,  H05K3/44 ,  H05K2201/0338 ,  H05K2201/0373 ,  H05K2201/068 ,  H05K2203/0323 ,  H05K2203/0723

Abstract: Die Oberfläche einer Metallfolie, wie sie namentlich als Zwischenlage in Leiterplatten Verwendung findet, wird auf photochemischem Weg aufgerauht. Die Teilschritte basieren auf gängigen Verfahrensschritten. Es werden feine Vertiefungen aus der Metallschicht herausgeätzt oder Erhöhungen aufplattiert. Die Anwendung des Verfahrens bzw. die Verwendung der Folie bei der Herstellung mehrlagiger Leiterplatten mit Schichten unterschiedlicher Wärmedehnung verbessert die Haftung mit der darauf angebrachten, nächsten Leiterbahnenlage wesentlich und verhindert ein delaminieren.

Abstract translation: 用作电路板中的中间层的金属箔的表面以光化学方式进行粗糙化。 部分阶段基于常规工艺阶段。 从金属层中蚀刻出细小的凹陷，或者在其上镀上高度。 该方法的应用和在制造具有不同热膨胀层的多层电路板中的薄膜的使用基本上改善了对其上施加的下一个导体带材层的粘附性并防止分层。

公开(公告)号：EP0443483A1

公开(公告)日：1991-08-28

申请号：EP91102264.8

申请日：1991-02-18

Applicant: GEC ALSTHOM SA

Inventor： Chave, Jacques

IPC: H05K7/20 ,  H05K3/10 ,  H05K3/34

CPC classification number: H05K3/341 ,  H01L21/4882 ,  H05K1/092 ,  H05K1/111 ,  H05K3/0061 ,  H05K2201/0373 ,  H05K2201/09681 ,  Y02P70/613

Abstract: Ce procédé est tel que la métallisation effectuée sur ledit élément, et nécessaire à la tenue du brasage, est effectuée suivant un motif discontinu (4), tel que les dimensions des aires non métallisées (5) soient réduites à des dimensions ne présentant pas de risque de détérioration dudit élément en fonctionnement.

Abstract translation: 检查此过程没有金属化的所述元件上实现，和必要的焊接的行为（完整性），是实现雅丁到不连续的图案（4），检查做了非金属化区域的尺寸（5）是 减小到不运行在操作中所述元件的恶化的风险大小。

公开(公告)号：EP0259035A3

公开(公告)日：1989-01-25

申请号：EP87307154.2

申请日：1987-08-13

Applicant: STC PLC

Inventor： Gainey, Trevor Clifford ,  Hall, Ian ,  Jones, Alan Robert

IPC: H01L21/60 ,  H01L21/58

CPC classification number: H01L24/81 ,  H01L24/31 ,  H01L24/83 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2224/81801 ,  H01L2224/83136 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/13091 ,  H01L2924/15787 ,  H05K1/092 ,  H05K1/111 ,  H05K3/248 ,  H05K3/341 ,  H05K2201/035 ,  H05K2201/0373 ,  H05K2201/10166 ,  H05K2201/10969 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49144 ,  H01L2924/00

Abstract: A power component such as a power transistor is mounted on an insulating substrate of e.g. Beryllia. By using a thick film deposition technique. A first layer (2) is deposited and a second layer (3) is deposited over the first layer to produce a regular series of troughs and lans, in the preferred embodiment troughs and ridges, whereby voiding in the solder bond is minimised if not eliminated to thus maintain a good thermal conductivity between the component and the substrate.

公开(公告)号：EP0260483A2

公开(公告)日：1988-03-23

申请号：EP87112271.9

申请日：1987-08-25

Applicant: KOLLMORGEN CORPORATION

Inventor： Karla, Helmut,

IPC: H05K3/44

CPC classification number: H05K3/44 ,  H05K3/427 ,  H05K3/445 ,  H05K2201/0373 ,  H05K2203/068 ,  H05K2203/1178 ,  H05K2203/1476

Abstract: Die Erfindung betrifft Metallkern-Leiterplatten, deren Metallkern mindestens eine Oberfläche aufweist, die mit Kanälen versehen ist, die den Luftaustritt aus Lochungen beim Beschichten mit Isolierstoff und damit die blasen­freie Füllung der Lochungen bewirken, sowie auf Ver­fahren zum Herstellen solcher Metallkern-Leiterplatten.

Abstract translation: 本发明涉及金属芯电路板，其金属芯具有至少一个表面，该表面设置有通道，该通道允许空气在用电介质材料涂覆期间从孔中露出，因此允许孔不填充而不起泡;以及制造方法 这种金属核心电路板。

公开(公告)号：EP0164674A2

公开(公告)日：1985-12-18

申请号：EP85106835.3

申请日：1985-06-03

Applicant: Advanced Technology Laboratories, Inc.

Inventor： Frey, Gregg W.

IPC: H01B1/22

CPC classification number: H05K3/4007 ,  C08K7/18 ,  C09J5/02 ,  H01B1/22 ,  H05K3/244 ,  H05K3/323 ,  H05K3/388 ,  H05K2201/0317 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/09754 ,  H05K2201/10234 ,  H05K2201/10977 ,  C08L63/00

Abstract: The present invention is a method and structure which produces extremely thin, electrically conductive epoxy bonds (24) between two substrates (12, 14). Copper microspheres (26), having an average diameter of about 2 microns are bound in an epoxy layer (28) which bonds two substrates (12, 14) together. The microspheres (26) make electrical contact between the substrates (12, 14) while providing inter- sphere gaps which are filled with the epoxy which actually bonds the substrates (12, 14) together.

公开(公告)号：EP0067366A3

公开(公告)日：1984-10-24

申请号：EP82104840

申请日：1982-06-03

Applicant: i f m electronic gmbh

Inventor： Buck, Robert, Ing. grad. ,  Lichte, Norbert, Ing. grad.

IPC: H03K17/945

CPC classification number: H03K17/945 ,  H05K3/0058 ,  H05K2201/0373 ,  H05K2201/056 ,  H05K2201/1003 ,  H05K2201/10446 ,  H05K2201/2009

公开(公告)号：US11678435B2

公开(公告)日：2023-06-13

申请号：US17455653

申请日：2021-11-18

Applicant: Roger Huang ,  Joe Huang ,  Lavender Cheng ,  Sean Chang

Inventor： Roger Huang ,  Joe Huang ,  Lavender Cheng ,  Sean Chang

IPC: H05K1/02 ,  H05K1/11 ,  H01L51/00 ,  H01L23/498 ,  H05K1/18 ,  H05K1/03

CPC classification number: H05K1/028 ,  H01L23/4985 ,  H01L51/0097 ,  H05K1/0393 ,  H05K1/11 ,  H05K1/18 ,  H05K2201/0373

Abstract: An electronic device is provided and includes a wiring structure including a conductive wiring and an insulating layer. The conductive wiring is disposed on a substrate and has a top side and two side walls opposite to each other. The insulating layer wraps around the conductive wiring at least through the top side and two side walls, wherein there is a gap between the insulating layer and at least one of the two side walls. The conductive wiring includes a first layer, a second layer and a third layer, the second layer is disposed between the first layer and the third layer, and the first layer is disposed between the second layer and the substrate. A thickness of the second layer is greater than a thickness of the first layer, and the thickness of the second layer is greater than a thickness of the third layer.

公开(公告)号：US20230172021A1

公开(公告)日：2023-06-01

申请号：US18162136

申请日：2023-01-31

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Byoungyong Kim ,  Seunghwa Ha ,  Seungsoo Ryu ,  Sanghyeon Song ,  Jeongdo Yang ,  Jungyun Jo ,  Jeongho Hwang

IPC: H10K59/131 ,  G02F1/1345 ,  H05K3/32 ,  H05K1/11 ,  H10K50/844 ,  H10K71/00

CPC classification number: H10K59/131 ,  G02F1/13458 ,  H05K3/328 ,  H05K1/111 ,  H10K50/844 ,  H10K71/00 ,  H05K1/112 ,  H05K3/32 ,  H05K2203/0285 ,  H05K2201/0373 ,  H05K2201/09845 ,  Y02P70/50

Abstract: A display apparatus includes a display panel having a display substrate on which a plurality of pad terminals is disposed, and a driving unit having a plurality of driving terminals electrically connected to the plurality of pad terminals. Each of the plurality of pad terminals includes a stepped groove that faces a corresponding driving terminal of the plurality of driving terminals or each of the plurality of pad terminals includes an opening hole that faces the corresponding driving terminal of the plurality of driving terminals.