公开(公告)号：US06332782B1

公开(公告)日：2001-12-25

申请号：US09597919

申请日：2000-06-19

Applicant: Raschid J. Bezama ,  Govindarajan Natarajan ,  Robert W. Pasco

Inventor： Raschid J. Bezama ,  Govindarajan Natarajan ,  Robert W. Pasco

IPC: H01R1200

CPC classification number: H05K1/141 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01R13/24 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/368 ,  H05K7/1061 ,  H05K2201/049 ,  H05K2201/09836 ,  H05K2201/10378 ,  H05K2201/10734

Abstract: An interconnect substrate structure for electrical interconnection between two electronic modules having differing conductive array parameters. The interconnect structure comprises an interposer having a top surface and a bottom surface; a first set of conductive arrays having a first conductive array parameter on the top surface, and a second set of conductive arrays having a second conductive array parameter on the bottom surface, the second conductive array and the first conductive array having differing parameters. A plurality of conductors traverses a thickness of the interposer, with the conductors comprising a conductive material optionally coated with a dielectric material, the conductors having a first end at the first conductive arrays and a second end at the second conductive arrays, whereby the conductors connecting the first and second conductive arrays therein are adapted to spatially transform the differing parameters to provide an electrical interconnection. A conductive matrix surrounds the conductors. The first set of conductive arrays comprise the same conductive array parameters as a first electronic module and the second set of conductive arrays comprise the same conductive array parameters as a second electronic module.

Abstract translation: 一种互连衬底结构，用于具有不同导电阵列参数的两个电子模块之间的电互连。 互连结构包括具有顶表面和底表面的插入件; 具有在顶表面上具有第一导电阵列参数的第一组导电阵列和在底表面上具有第二导电阵列参数的第二组导电阵列，所述第二导电阵列和第一导电阵列具有不同的参数。 多个导体横穿插入件的厚度，导体包括任选地涂覆有电介质材料的导电材料，导体在第一导电阵列处具有第一端，在第二导电阵列处具有第二端，由此导体连接 其中的第一和第二导电阵列适于空间转换不同的参数以提供电互连。 导电矩阵围绕导体。 第一组导电阵列包括与第一电子模块相同的导电阵列参数，并且第二组导电阵列包括与第二电子模块相同的导电阵列参数。

公开(公告)号：US06271483B1

公开(公告)日：2001-08-07

申请号：US09202432

申请日：1998-12-15

Applicant: Michio Horiuchi ,  Toshiaki Suyama ,  Masakuni Tokita

Inventor： Michio Horiuchi ,  Toshiaki Suyama ,  Masakuni Tokita

IPC: H06R909

CPC classification number: H01L23/49827 ,  H01L2223/6622 ,  H01L2924/0002 ,  H01L2924/15174 ,  H05K1/112 ,  H05K1/115 ,  H05K3/4038 ,  H05K2201/09836 ,  H05K2201/10287 ,  H05K2201/10977 ,  H05K2203/0235 ,  H01L2924/00

Abstract: A wiring board has vias which penetrate the wiring board from one side to the other side. The vias are radially arranged in the direction from one side to the other side so that the interval between the vias on one side can be made smaller than the interval between the vias on the other side. In order to prevent the vias from being electrically short-circuited to each other, even if the interval between the vias provided on one side of the wiring board is extremely reduced, a plurality of vias are radially arranged in the direction from one side of the wiring board to the other side so that an interval between the vias on one side of the wiring board can be made smaller than interval of the vias on the other side. A conductor forming the core portion of the via is coated with a sheath portion made of insulating material.

Abstract translation: 布线板具有从一侧到另一侧穿过布线板的通孔。 通孔沿从一侧到另一侧的方向径向布置，使得一侧的通孔之间的间隔可以小于另一侧的通孔之间的间隔。 为了防止通孔彼此电短路，即使设置在布线板的一侧上的通孔之间的间隔极大地减小，多个通孔沿着从一侧的方向 将布线板连接到另一侧，使得布线板一侧的通路之间的间隔可以小于另一侧的通孔的间隔。 形成通孔的芯部的导体涂覆有由绝缘材料制成的护套部分。

公开(公告)号：US5838567A

公开(公告)日：1998-11-17

申请号：US677989

申请日：1996-07-10

Applicant: Robert F. Boggio, Jr.

Inventor： Robert F. Boggio, Jr.

IPC: G06F17/50 ,  H05K3/00 ,  H05K3/12 ,  H05K3/46 ,  G06F19/00

CPC classification number: H05K3/1241 ,  H05K3/00 ,  H05K2201/09836 ,  H05K2203/0235 ,  Y10T29/53174

Abstract: Circuit boards are fabricated in an incremental fashion. Conventional design data representing a layout of the circuit board is received. The design data is transformed into a three-dimensional matrix of increments (e.g., cubes) representing the circuit board, where each increment or cube within the matrix is identified by an address and is assigned a fabrication material. The circuit board is then built at a fabrication station by depositing the assigned fabrication materials onto a fabrication base in an incremental fashion as indicated by the matrix.

Abstract translation: 电路板以渐进的方式制造。 接收表示电路板布局的常规设计数据。 将设计数据变换成表示电路板的增量（例如，立方体）的三维矩阵，其中矩阵内的每个增量或立方体由地址标识并被分配制造材料。 然后，电路板通过以基体表示的递增方式将所分配的制造材料沉积到制造基座上而在制造工地构建。

公开(公告)号：US5352325A

公开(公告)日：1994-10-04

申请号：US98637

申请日：1993-07-28

Applicant: Yoji Kato

Inventor： Yoji Kato

IPC: H05K3/00 ,  H05K3/06 ,  H05K3/42 ,  B44C1/22 ,  B23F1/00 ,  B29C37/00

CPC classification number: H05K3/002 ,  H05K2201/09509 ,  H05K2201/09836 ,  H05K2203/0285 ,  H05K2203/0292 ,  H05K2203/0554 ,  H05K2203/0789 ,  H05K2203/0793 ,  H05K2203/0796 ,  H05K2203/1184 ,  H05K3/427

Abstract: The present invention is a method of forming micro through holes in printed wiring board substrate materials by means of chemical etching.In a typical printed wiring board substrate material consisting of a resinous dielectric base material, (which may or may not incorporate glass fibers), clad on both sides by a conductive layer, after the dielectric material in specific locations where through holes are to be formed is exposed by typical processes in which the conductor layer is selectively removed by etching, said exposed dielectric material is first softened, then removed by chemical etching involving several steps and procedures as well as a variety of chemical solutions, under vibratory agitation, forming through holes in said locations of 100 microns diameter or less.Employing the method of the present invention it is possible to determine the position, size and shape of the through hole required and also by means of plating to connect the conductive layers through the dielectric forming micro plated through holes in printed wiring boards.

Abstract translation: 本发明是通过化学蚀刻在印刷线路板基板材料中形成微通孔的方法。 在由树脂电介质基材（其可以或可以不包括玻璃纤维）组成的典型的印刷线路板基板材料中，在导电层的两侧上包覆在介电材料在要形成通孔的特定位置之后 通过通过蚀刻选择性地去除导体层的典型工艺暴露，首先软化所述暴露的电介质材料，然后通过涉及几个步骤和程序的化学蚀刻以及各种化学溶液在振动搅拌下除去，形成通孔 在直径为100微米或更小的所述位置。 采用本发明的方法，可以确定所需通孔的位置，尺寸和形状，并且还可以通过电镀来连接通过印刷电路板中的电介质形成微电镀通孔的导电层。

公开(公告)号：US20150380391A1

公开(公告)日：2015-12-31

申请号：US14848504

申请日：2015-09-09

Applicant: Zhen Ding Technology Co., Ltd.

Inventor： Yong HA WOO ,  E-Tung CHOU ,  Wen-Lun LO

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/498 ,  H05K1/09 ,  H05K1/11

CPC classification number: H01L25/105 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49866 ,  H01L24/09 ,  H01L2224/08238 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/15738 ,  H01L2924/181 ,  H05K1/09 ,  H05K1/115 ,  H05K3/0017 ,  H05K3/3436 ,  H05K3/4007 ,  H05K2201/0347 ,  H05K2201/0379 ,  H05K2201/09836 ,  H05K2201/10674 ,  H05K2203/0384 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A packaging substrate includes a circuit board, a number of first conductive posts, and a number of second conductive posts. The circuit board includes a first base and a first conductive pattern layer formed on a first surface of the first base. The first conductive posts extend from and are electrically connected to the first conductive pattern layer. The second conductive posts extend from and are electrically connected to the first conductive pattern layer. The height of each of the second conductive posts is larger than that of each of the first conductive posts. A manufacturing method thereof is also provided.

Abstract translation: 封装基板包括电路板，多个第一导电柱和多个第二导电柱。 电路板包括形成在第一基底的第一表面上的第一基底和第一导电图案层。 第一导电柱从第一导电图案层延伸并电连接到第一导电图案层。 第二导电柱从第一导电图案层延伸并与之电连接。 每个第二导电柱的高度大于每个第一导电柱的高度。 还提供了其制造方法。

公开(公告)号：US20150201500A1

公开(公告)日：2015-07-16

申请号：US14169169

申请日：2014-01-31

Applicant: Zohar SHINAR ,  Joel VIDAL

Inventor： Zohar SHINAR ,  Joel VIDAL

IPC: H05K3/12 ,  B29C67/00

CPC classification number: H05K3/125 ,  B29C64/112 ,  B29C64/135 ,  B29C64/386 ,  B29C70/882 ,  B29K2105/0058 ,  B29K2995/0005 ,  B29K2995/0007 ,  B29L2031/3406 ,  B29L2031/3425 ,  B33Y30/00 ,  B33Y50/02 ,  B33Y80/00 ,  H05K1/0206 ,  H05K1/025 ,  H05K1/0253 ,  H05K1/0268 ,  H05K1/0269 ,  H05K1/0274 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/0284 ,  H05K1/092 ,  H05K1/165 ,  H05K1/167 ,  H05K1/186 ,  H05K3/0005 ,  H05K3/1283 ,  H05K3/225 ,  H05K3/284 ,  H05K3/4007 ,  H05K3/4069 ,  H05K3/4664 ,  H05K3/4685 ,  H05K3/4688 ,  H05K2201/0367 ,  H05K2201/037 ,  H05K2201/0391 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/098 ,  H05K2201/09836 ,  H05K2201/09845 ,  H05K2201/09872 ,  H05K2201/10098 ,  H05K2203/013 ,  H05K2203/107 ,  H05K2203/163 ,  H05K2203/166

Abstract: Device, system, and method of three-dimensional printing. A device includes: a first 3D-printing head to selectively discharge conductive 3D-printing material; a second 3D-printing head to selectively discharge insulating 3D-printing material; and a processor to control operations of the first and second 3D-printing heads based on a computer-aided design (CAD) scheme describing a printed circuit board (PCB) intended for 3D-printing. A 3D-printer device utilizes 3D-printing methods, in order to 3D-print: (a) a functional multi-layer PCB; or (b) a functional stand-alone electric component; or (c) a functional PCB having an embedded or integrated electric component, both of them 3D-printed in a unified 3D-printing process.

Abstract translation: 三维打印的设备，系统和方法。 一种装置包括：第一3D打印头，用于选择性地排放导电3D打印材料; 第二3D打印头，用于选择性地放电绝缘3D打印材料; 以及基于描述用于3D打印的印刷电路板（PCB）的计算机辅助设计（CAD）方案来控制第一和第二3D打印头的操作的处理器。 3D打印机设备利用3D打印方法，以便3D打印：（a）功能性多层PCB; 或（b）功能独立电气部件; 或（c）具有嵌入或集成电气部件的功能PCB，它们都以统一的3D打印过程3D打印。

公开(公告)号：US20150076113A1

公开(公告)日：2015-03-19

申请号：US14481572

申请日：2014-09-09

Applicant: ASAHI GLASS COMPANY, LIMITED

Inventor： Kohei HORIUCHI

IPC: B44C1/22

CPC classification number: B44C1/228 ,  B23K26/382 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/50 ,  B23K2103/54 ,  H01L21/486 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/0029 ,  H05K2201/09836 ,  H05K2201/10204 ,  H05K2203/163 ,  H01L2924/00

Abstract: A method including a) forming a through-hole in a dummy substrate including a surface by radiating a laser to the surface of the dummy substrate in a state where the dummy substrate is moved relative to the laser along a direction parallel to the surface of the dummy substrate, b) determining an angle α (−90°

Abstract translation: 一种方法，包括：在虚拟衬底相对于激光器沿着平行于所述虚拟衬底的表面的方向相对于激光器移动的状态下，通过在所述虚设衬底的表面辐射激光而在包括表面的虚设衬底中形成通孔 虚拟基板，b）确定通孔相对于垂直于虚设基板的表面的线的角度α（-90°<α<+ 90°），以及c）在绝缘基板中形成通孔 与步骤a）相同的条件，除了以角度＆bgr辐射激光; 相对于垂直于绝缘基板的表面的线。 角度＆bgr 被设定为相对于垂直于绝缘基板的表面的线的角度α线对称，并且满足＆bgr =α的关系。

公开(公告)号：US20150053475A1

公开(公告)日：2015-02-26

申请号：US14463489

申请日：2014-08-19

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Jung Keun Kim

IPC: H05K1/11 ,  H05K1/02

CPC classification number: H05K1/0265 ,  H05K1/115 ,  H05K2201/09536 ,  H05K2201/09636 ,  H05K2201/09836 ,  H05K2201/09854

Abstract: There is provided a multi layered printed circuit board. The multi layered printed circuit board according to an exemplary embodiment of the present disclosure includes: a plurality of circuit layers; insulating layers each formed between the plurality of circuit layers; and a via penetrating through the insulating layers and the circuit layers and electrically connecting the plurality of circuit layers to each other, wherein the via includes a first via and a second via, and the second via is a large diameter via having a diameter larger than that of the first via.

Abstract translation: 提供了多层印刷电路板。 根据本公开的示例性实施例的多层印刷电路板包括：多个电路层; 绝缘层各自形成在所述多个电路层之间; 以及穿过绝缘层和电路层并且将多个电路层彼此电连接的通孔，其中所述通孔包括第一通孔和第二通孔，并且所述第二通孔是大直径通孔，其直径大于 那第一个通过。

公开(公告)号：US20130328214A1

公开(公告)日：2013-12-12

申请号：US13966633

申请日：2013-08-14

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Takamasa Takano

IPC: H01L23/48

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/1579 ,  H05K1/113 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09436 ,  H05K2201/09581 ,  H05K2201/09609 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1178 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49165 ,  H01L2224/05647 ,  H01L2924/01024 ,  H01L2924/01079

Abstract: A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.

Abstract translation: 一种制造通孔电极基板的方法包括在基板上形成多个通孔，通过在多个通孔中填充导电材料形成多个通孔电极，在一个通孔上形成第一绝缘层 在所述第一绝缘层上形成多个第一开口，所述多个第一开口将与所述多个通孔电极中的每一个相对应的多个通孔电极暴露在所述第一绝缘层上，并且使用所述关系来校正所述多个第一开口的位置 在多个通孔中的倾斜通孔的打开位置的测量距离值的偏移量与多个通孔中的倾斜通孔的打开位置的设计距离值之间， 相对于基板的中心位置。

公开(公告)号：US08453917B1

公开(公告)日：2013-06-04

申请号：US13655555

申请日：2012-10-19

Applicant: STMicroelectronics S.r.l.

Inventor： Concetto Privitera ,  Cristiano Gianluca Stella

IPC: B23K31/02

CPC classification number: H05K3/3468 ,  H05K1/0206 ,  H05K1/112 ,  H05K3/303 ,  H05K3/3431 ,  H05K2201/09836 ,  H05K2201/10166 ,  H05K2203/044 ,  Y02P70/613

Abstract: A system includes a device of the surface-mounting type having an insulating package provided with a mounting surface and a contact pin exposed on the mounting surface. The device is attached to an insulating board including a gluing surface and an opposite surface. The process for manufacturing the system includes forming through holes a contact region on the gluing surface. The mounting surface is glued to the gluing surface with the contact pin aligned with the contact region. Wave soldering is performed to electrically join the device to the board by hitting the opposite surface with a wave of soldering paste to form, by capillary action with the soldering paste ascending in the through holes up to the overflow on the gluing surface, a conductive contact electrically connecting the contact pin of the electronic device through a solder connection to the contact region of the electronic board.

Abstract translation: 一种系统包括表面安装型的装置，其具有设置有安装表面的绝缘封套和暴露在安装表面上的接触销。 该装置附接到包括胶合表面和相对表面的绝缘板。 制造该系统的方法包括在胶合表面上形成通孔的接触区域。 安装表面胶合到胶合表面，接触销与接触区域对准。 进行波峰焊接以通过用焊膏波撞击相对表面来将该装置电连接到板上，通过毛细作用形成通过在通孔中上升至焊接表面上的溢流的焊膏的导电接触 通过焊接连接将电子设备的接触针电连接到电子板的接触区域。