公开(公告)号：AU2003287361A1

公开(公告)日：2004-09-28

申请号：AU2003287361

申请日：2003-10-28

Applicant: IBM

Inventor： VOLANT RICHARD P ,  FLORKEY JOHN E ,  GROVES ROBERT A

IPC: B81B3/00 ,  H01F7/06 ,  H01F7/14 ,  H01H59/00 ,  H03K17/965

Abstract: A micro-electro mechanical (MEM) switch capable of inductively coupling and decoupling electrical signals is described. The inductive MEM switch consists of a first plurality of coils on a movable platform and a second plurality of coils on a stationary platform or substrate, the coils on the movable platform being above or below those in the stationary substrate. Coupling and decoupling occurs by rotating or by laterally displacing the coils of the movable platform with respect to the coils on the stationary substrate. Diverse arrangements of coils respectively on the movable and stationary substrates allow for a multi-pole and multi-position switching configurations. The MEM switches described eliminate problems of stiction, arcing and welding of the switch contacts. The MEMS switches of the invention can be fabricated using standard CMOS techniques.

公开(公告)号：AU2003278176A1

公开(公告)日：2004-05-13

申请号：AU2003278176

申请日：2003-09-18

Applicant: IBM

Inventor： CHINTHAKINDI ANIL K ,  GROVES ROBERT A ,  STEIN KENNETH J ,  SUBBANNA SESHADRI ,  VOLANT RICHARD P

IPC: B81B7/00 ,  B81C1/00 ,  H01G5/011 ,  H01G5/18 ,  H03J3/18 ,  B81B3/00

Abstract: A three-dimensional micro- electromechanical (MEM) varactor is described wherein a movable beam and fixed electrode are respectively fabricated on separate substrates coupled to each other. The movable beam with comb-drive electrodes are fabricated on the "chip side" while the fixed bottom electrode is fabricated on a separated substrate "carrier side". Upon fabrication of the device on both surfaces of the substrate, the chip side device is diced and "flipped over", aligned and joined to the "carrier" substrate to form the final device. Comb-drive (fins) electrodes are used for actuation while the motion of the electrode provides changes in capacitance. Due to the constant driving forces involved, a large capacitance tuning range can be obtained. The three dimensional aspect of the device avails large surface area. When large aspect ratio features are provided, a lower actuation voltage can be used. Upon fabrication, the MEMS device is completely encapsulated, requiring no additional packaging of the device. Further, since alignment and bonding can be done on a wafer scale (wafer scale MEMS packaging), an improved device yield can be obtained at a lower cost.

公开(公告)号：DE60237354D1

公开(公告)日：2010-09-30

申请号：DE60237354

申请日：2002-03-13

Applicant: IBM

Inventor： ACOSTA RAUL E ,  CARASSO MELANIE L ,  CORDES STEVEN A ,  GROVES ROBERT A ,  LUND JENNIFER L ,  ROSNER JOANNA

IPC: H01L29/82 ,  H01F17/00 ,  H01F17/04 ,  H01F17/06 ,  H01F27/00 ,  H01F27/06 ,  H01F41/04 ,  H01L21/02 ,  H01L27/08 ,  H01L29/00

公开(公告)号：DE60224836T2

公开(公告)日：2009-01-08

申请号：DE60224836

申请日：2002-11-07

Applicant: IBM

Inventor： VOLANT RICHARD P ,  BISSON JOHN C ,  COTE DONNA R ,  DALTON TIMOTHY J ,  GROVES ROBERT A ,  PETRARCA KEVIN S ,  STEIN KENNETH J ,  SUBBANNA SESHADRI

IPC: B81C1/00 ,  B81B3/00 ,  H01H49/00 ,  H01H59/00

Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.

公开(公告)号：MY127563A

公开(公告)日：2006-12-29

申请号：MYPI20020088

申请日：2002-01-11

Applicant: IBM

Inventor： BALLANTINE ARNE W ,  GROVES ROBERT A ,  LUND JENNIFER L ,  NAKOS JAMES S ,  RICE MICHAEL B ,  STAMPER ANTHONY K

IPC: H01L21/768 ,  H01L29/00 ,  H01L21/00 ,  H01L21/20 ,  H01L21/822 ,  H01L23/48 ,  H01L23/52 ,  H01L23/522 ,  H01L23/58 ,  H01L27/04 ,  H01M4/58 ,  H01M6/02 ,  H01M6/18 ,  H01M6/42 ,  H01M10/052 ,  H01M10/0562 ,  H01M10/058 ,  H01M10/36 ,  H01M10/42

Abstract: A METHOD AND STURCTURE THAT PROVIDES A BATTERY (420) WITHIN AN INTEGRATED CIRCUIT (400) FOR PROVIDING VOLTAGE TO LOW-CURRENT ELECTRONIC DEVICES (900) THAT EXIST WITHIN THE INTERGRATED CIRCUIT. THE METHOD INCLUDES FRONT-END-OF-LINE (FEOL) PROCESSING FOR GENERATING A LAYER OF ELECTRONIC DEVICES ON A SEMICONDUCTOR WAFER (402), FOLLOWED BY BACK-END-OF-LINE(BEOL) INTEGRATION FOR WIRES THE BEOL INTEGRATION INCLUDES FORMING A MULTILAYERED STRUCTURE OF WIRING LEVELS ON THE LAYER OF ELECTORINC DEVICES. EACH WIRING LEVEL INCLUDES CONDUCTIVE METALLIZATION (E.G., METAL-PLATED VIAS CONDUCTIVE WIRING LINES, ETC) EMBEDDED IN INSULATIVE MATERIAL. THE BATTERY IS FORMED DURING BEOL INTEGRATION WITHIN ONE OR MORE WIRING LEVELS, AND THE CONDUCTIVE METALLIZATION (432,434,442,444)(E.G.,METAL-PALTED VIAS,CONDUCTIVE WIRING LINES, ETC.)EMBEDDED IN INSULATIVE MATERIAL.THE BATTERY IS FORMED DURING BEOL INTEGRATION WITHIN ONE OR MORE WIRING LEVELS,AND THE CONDUCTIVE METALLIZATION CONDUCTIVELY COUPLE POSITIVE (424) AND NEGATIVE (422) TERMINALS OF THE BATERRY TO THE ELECTRONIC DEVICES.THE BATERRY MAY HAVE SEVERAL DIFFERENT TOPOLOGIES RELATIVE TO THE STRUCTURAL AND GEOMETRICAL RELATIONSHIPS AMONG THE BATERRY ELECTRODES AND ELECTROLYTE.MULTIPLE BATTERIES MAY BE FORMED WITHIN ONE OR MORE WIRING LEVELS,AND MAY BE CONDUCTIVELY COUPLE TO THE ELECTRONIC DEVICES.THE MULTIPLE BATERIES MAY BE CONNECTED IN SERIES OR IN PARALLEL.(FIG.1)

公开(公告)号：PL377816A1

公开(公告)日：2006-02-20

申请号：PL37781603

申请日：2003-10-28

Applicant: IBM

Inventor： VOLANT RICHARD P ,  FLORKEY JOHN E ,  GROVES ROBERT A

IPC: H01F21/04 ,  B81B3/00 ,  H01F7/06 ,  H01F7/14 ,  H01H59/00 ,  H03K17/965