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    Bauelement mit einer ringförmigen Metallstruktur und Verfahren
    21.
    发明专利
    Bauelement mit einer ringförmigen Metallstruktur und Verfahren 未知

    公开(公告)号：DE102010036978B4

    公开(公告)日：2014-09-11

    申请号：DE102010036978

    申请日：2010-08-13

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： LACHNER RUDOLF ,  BOECK JOSEF ,  AUFINGER KLAUS ,  KNAPP HERBERT

    IPC: H01L23/367 ,  H01L21/56 ,  H01L21/60 ,  H01L21/768 ,  H01L23/433 ,  H01L23/50

    Abstract: Bauelement (100), umfassend: einen Halbleiterchip (10), der ein Halbleitersubstrat (21) und eine ringförmige Metallstruktur (11) umfasst, die sich entlang einer Außenlinie (12) einer ersten Hauptoberfläche (13) des Halbleiterchips (10) erstreckt, wobei die ringförmige Metallstruktur (11) mehrere übereinander angeordnete und durch Vias miteinander gekoppelte Metallschichten umfasst, wobei die unterste Metallschicht über ein Via an das Halbleitersubstrat (21) gekoppelt ist, einen Kapselungskörper (14), der den Halbleiterchip (10) kapselt und eine zweite Hauptoberfläche (15) definiert, und ein Array von externen Kontaktpads (16), die an der zweiten Hauptoberfläche (15) des Kapselungskörpers (14) befestigt sind, wobei mindestens ein externes Kontaktpad (16) des Arrays von externen Kontaktpads (16) über eine oberhalb des Halbleiterchips (10) angeordnete Metallschicht (18) elektrisch an die oberste Metallschicht der ringförmigen Metallstruktur (11) gekoppelt ist.

    24.
    发明专利
    未知

    公开(公告)号：DE10159414A1

    公开(公告)日：2003-06-18

    申请号：DE10159414

    申请日：2001-12-04

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： LACHNER RUDOLF

    IPC: H01L21/331 ,  H01L29/732 ,  H01L29/73 ,  H01L21/8249

    Abstract: The invention relates to a method for producing a bipolar transistor, which comprises the following steps: providing a sequence of layers (10) that comprises a substrate (12), a first oxide layer (14) and an SOI layer (16), producing a collector region (24) in the substrate (12), producing a second oxide layer (18) on the sequence of layers (10), producing a base region (26) in the first oxide layer (14) in such a manner that the base region (26) is contacted with the SOI layer (16), producing an emitter region (38) on the base region (26) in such a manner that the emitter region (38) is insulated from the SOI layer (16), and producing a collector contact (50), a base contact (46) and an emitter contact (48). The invention is based on the finding that a bipolar transistor can be produced in a substantially simpler manner when the above-described sequence of layers is used and when the base region (26) is produced in the BOX layer (14) while the collector region (24) is produced in the substrate. The inventive method no longer requires otherwise necessary production steps, especially steps for applying or depositing layers for example a polysilicon or oxide layer.

    29.
    发明专利
    未知

    公开(公告)号：DE10250204B8

    公开(公告)日：2008-09-11

    申请号：DE10250204

    申请日：2002-10-28

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： STENGL REINHARD ,  MEISTER THOMAS ,  SCHAEFER HERBERT ,  BOECK JOSEF ,  SECK MARTIN ,  LACHNER RUDOLF

    IPC: H01L21/8222 ,  H01L21/331 ,  H01L27/082 ,  H01L29/08 ,  H01L29/732

    Abstract: A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.

    30.
    发明专利
    未知

    公开(公告)号：DE10250204B4

    公开(公告)日：2008-04-30

    申请号：DE10250204

    申请日：2002-10-28

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： STENGL REINHARD ,  MEISTER THOMAS ,  SCHAEFER HERBERT ,  BOECK JOSEF ,  SECK MARTIN ,  LACHNER RUDOLF

    IPC: H01L21/8222 ,  H01L21/331 ,  H01L27/082 ,  H01L29/08 ,  H01L29/732

    Abstract: A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.

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