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公开(公告)号:DE502006007151D1
公开(公告)日:2010-07-22
申请号:DE502006007151
申请日:2006-08-23
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHWERD MARKUS , KOERNER HEINRICH , HOMMEL MARTINA , SECK MARTIN
IPC: H01L23/522
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公开(公告)号:DE10328008B4
公开(公告)日:2008-04-03
申请号:DE10328008
申请日:2003-06-21
Applicant: INFINEON TECHNOLOGIES AG
Inventor: DREXL STEFAN , SECK MARTIN , BOETTNER THOMAS , HUTTNER THOMAS
IPC: H01L27/082 , H01L21/8228 , H01L29/417
Abstract: An explanation is given of, inter alia, an integrated circuit arrangement ( 100 ) containing an npn transistor ( 102 ) and a pnp transistor ( 104 ). Transistors with outstanding electrical properties are produced if the pnp transistor contains a cutout ( 142 ) for an edge terminal region ( 120 ) and if the edge terminal region ( 120 ) has a part near the substrate which is arranged in the cutout ( 142 ) and a part remote from the substrate which is arranged outside the cutout ( 142 ) and overlaps the base terminal region ( 139 ).
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公开(公告)号:DE102005045060B4
公开(公告)日:2007-07-05
申请号:DE102005045060
申请日:2005-09-21
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHWERD MARKUS , KOERNER HEINRICH , HOMMEL MARTINA , SECK MARTIN
IPC: H01L23/522 , H01L21/768 , H01L27/08
Abstract: The substrate (20) integrates semiconductor components. There are three circuit planes. These are designated close, intermediate or remote, with respect to the substrate, i.e. their spacing from the substrate increases with each layer. Each circuit plane contains a planar base surface and a planar covering surface adjoining a dielectric. The base surface of the circuit plane remote from the substrate (76), extends in a plane occupied by the covering surface of the intermediate circuit plane. Alternatively the base surface of the circuit plane remote from the substrate, extends in a plane lying closer to the substrate than a plane occupied by the covering surface of the intermediate circuit plane. In addition, the base surface of the intermediate circuit plane extends in a plane occupied by the covering surface of the circuit plane near the substrate. Alternatively the base surface of the intermediate circuit plane extends in a plane closer to the substrate than that occupied by the covering surface of the circuit plane close to the substrate. Circuit elements in the structure are further elaborated. A component formed by the elements (A-G), comprises one, two or more windings of a coil, a side wall of a coaxial line or parts of a condenser exceeding 10 mu m or 50 mu m in length. Salient features include use of aluminum or copper to form the tracks (34-38), at 60 atom% concentrations. They form internal conductors of the circuit (10). An even more remote conductive structure is included. One or more further circuit planes are included between the substrate and the circuit plane closest to it. An independent claim is also included for the method of manufacture.
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公开(公告)号:DE102005045056B4
公开(公告)日:2007-06-21
申请号:DE102005045056
申请日:2005-09-21
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHWERD MARKUS , KOERNER HEINRICH , HOMMEL MARTINA , SECK MARTIN
IPC: H01L23/522 , H01L21/768 , H01L27/08
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公开(公告)号:DE102005045059A1
公开(公告)日:2007-03-29
申请号:DE102005045059
申请日:2005-09-21
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHWERD MARKUS , KOERNER HEINRICH , HOMMEL MARTINA , SECK MARTIN
IPC: H01L23/522 , H01L27/08
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公开(公告)号:DE102005045057A1
公开(公告)日:2007-03-22
申请号:DE102005045057
申请日:2005-09-21
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHWERD MARKUS , KOERNER HEINRICH , HOMMEL MARTINA , SECK MARTIN
IPC: H01L23/522 , H01L23/64
Abstract: An integrated circuit (310) comprises an integrated element with conductive traces that are near the substrate (320), in the middle and far from the substrate respectively (324,328,334), spaced from the substrate in the same direction and having planar base and cover surfaces. The conductive traces are five or ten times longer than their width and the cover surface of the middle trace bounds the base of the upper trace and its base bounds the cover surface of the trace nearest the substrate. An independent claim is also included for an integrated circuit as above not having a middle trace.
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公开(公告)号:DE10337569A1
公开(公告)日:2005-03-24
申请号:DE10337569
申请日:2003-08-14
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HELNEDER JOHANN , GOEBEL THOMAS , SCHWERD MARKUS , MITCHELL ANDREA , KOERNER HEINRICH , SECK MARTIN , DREXL STEFAN , KLEIN WOLFGANG , HOMMEL MARTINA
IPC: H01L23/485 , H01L23/532 , H01L23/522 , H01L21/768
Abstract: A connection arrangement having an outer conductive structure arranged at least partly or completely in a cutout of an electrical insulation layer is provided. An inner conductive structure is arranged at the bottom of the cutout on one side of the insulation layer. The inner conductive structure adjoins the outer conductive structure in a contact zone. A contact area is arranged at the outer conductive structure on the other side of the cutout. The contact zone and the contact area do not overlap. The bottom of the cutout is arranged to overlaps at least half of the contact area, to provide a step in the insulation layer at the edge of the cutout outside a main current path between the contact area and the inner conductive structure.
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公开(公告)号:DE10328008A1
公开(公告)日:2005-02-03
申请号:DE10328008
申请日:2003-06-21
Applicant: INFINEON TECHNOLOGIES AG
Inventor: DREXL STEFAN , SECK MARTIN , BOETTNER THOMAS , HUTTNER THOMAS
IPC: H01L21/8228 , H01L27/082 , H01L29/417 , H01L21/331
Abstract: An explanation is given of, inter alia, an integrated circuit arrangement ( 100 ) containing an npn transistor ( 102 ) and a pnp transistor ( 104 ). Transistors with outstanding electrical properties are produced if the pnp transistor contains a cutout ( 142 ) for an edge terminal region ( 120 ) and if the edge terminal region ( 120 ) has a part near the substrate which is arranged in the cutout ( 142 ) and a part remote from the substrate which is arranged outside the cutout ( 142 ) and overlaps the base terminal region ( 139 ).
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