公开(公告)号：WO2005041273A3

公开(公告)日：2005-09-09

申请号：PCT/DE2004002266

申请日：2004-10-12

Applicant: INFINEON TECHNOLOGIES AG ,  HELNEDER JOHANN ,  SCHWERD MARKUS ,  GOEBEL THOMAS ,  MITCHELL ANDREA ,  KOERNER HEINRICH ,  DREXL STEFAN ,  SECK MARTIN

Inventor： HELNEDER JOHANN ,  SCHWERD MARKUS ,  GOEBEL THOMAS ,  MITCHELL ANDREA ,  KOERNER HEINRICH ,  DREXL STEFAN ,  SECK MARTIN

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/7682 ,  H01L23/5222 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to a method for reducing parasitic couplings in circuits in which dummy structures are embedded in previous production method steps. The invention aims at providing a method that makes it possible to improve decoupling values and reduce the degree of complexity of said method. This is achieved in that the dummy structures (3) are removed at least partly by means of etching steps and cavities (4) are produced.

Abstract translation: 本发明涉及一种用于减少电路寄生耦合，其中虚设图案被嵌入为以前的制造工艺步骤的目的在于提供通过该解耦值的提高和处理成本降低的方法等。 该目的的实现在于该虚设结构（3）通过蚀刻至少部分地去除和空腔（4）的生成。

公开(公告)号：DE102010016184A1

公开(公告)日：2010-12-02

申请号：DE102010016184

申请日：2010-03-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MARTIN ANDREAS ,  MITCHELL ANDREA ,  RYDEN KARL-HENRIK

IPC: H01L23/544 ,  G01N27/04 ,  H01L21/66

Abstract: Es werden ein System zur Prüfung und ein Verfahren zur Herstellung eines Halbleiterbauelements offenbart. Eine bevorzugte Ausführungsform weist einen Leiter auf, der über einer dielektrischen Schicht (305) liegt. Der Leiter ist über eine erste leitende Leitung (311) mit einer ersten Prüfkontaktstelle (321) und über eine zweite leitende Leitung (312) mit einer zweiten Prüfkontaktstelle (322) gekoppelt.

公开(公告)号：DE10341059A1

公开(公告)日：2005-04-14

申请号：DE10341059

申请日：2003-09-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HELNEDER JOHANN ,  SCHWERD MARKUS ,  GOEBEL THOMAS ,  MITCHELL ANDREA ,  KOERNER HEINRICH ,  SECK MARTIN ,  TORWESTEN HOLGER

IPC: H01L21/02 ,  H01L21/316 ,  H01L23/522 ,  H01L27/01 ,  H01L27/08 ,  H01L21/822 ,  H01G9/042

Abstract: An integrated circuit and fabrication method are presented. The integrated circuit includes a capacitor containing a base electrode, a covering electrode, and a dielectric between the base and covering electrodes. The dielectric contains an oxide of a material contained in the base electrode, which may be produced by anodic oxidation. A peripheral edge of the dielectric is uncovered by the covering electrode. A base layer on the capacitor includes a cutout adjacent to the dielectric. During fabrication, the base layer protects the material of the base electrode that is to be anodically oxidized from chemicals, and also protects the surrounding regions from anodic oxidation. A precision resistor may be fabricated simultaneously with the capacitor.

公开(公告)号：DE10348641A1

公开(公告)日：2005-05-25

申请号：DE10348641

申请日：2003-10-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HELNEDER JOHANN ,  SCHWERD MARKUS ,  GOEBEL THOMAS ,  MITCHELL ANDREA ,  KOERNER HEINRICH ,  DREXL STEFAN ,  SECK MARTIN

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/76 ,  H01L27/08

公开(公告)号：DE102010016184B4

公开(公告)日：2019-05-29

申请号：DE102010016184

申请日：2010-03-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MARTIN ANDREAS ,  MITCHELL ANDREA ,  RYDEN KARL-HENRIK

IPC: H01L23/544 ,  G01N27/04 ,  H01L21/66

Abstract: Prüfstruktur (300), aufweisend:eine dielektrische Schicht (305);einen an die dielektrische Schicht (305) angrenzenden ersten leitfähigen Bereich;einen von dem ersten leitfähigen Bereich durch die dielektrische Schicht (305) getrennten zweiten leitfähigen Bereich;eine erste Prüfkontaktstelle (321);eine erste leitende Leitung (311), die die erste Prüfkontaktstelle (321) mit dem ersten leitfähigen Bereich koppelt;eine zweite Prüfkontaktstelle (322);eine zweite leitende Leitung (312), die die zweite Prüfkontaktstelle (322) mit dem ersten leitfähigen Bereich koppelt; undeine elektrisch mit dem zweiten leitfähigen Bereich gekoppelte dritte Prüfkontaktstelle (323);wobei die erste leitende Leitung (311) zwischen der ersten Prüfkontaktstelle (321) und dem ersten leitfähigen Bereich einen ersten Widerstand aufweist und wobei die zweite leitende Leitung (312) zwischen der zweiten Prüfkontaktstelle (322) und dem ersten leitfähigen Bereich einen zweiten Widerstand aufweist, wobei die zweite leitende Leitung (312) schmäler als die erste leitende Leitung (311) ist, und wobei der erste Widerstand kleiner als der zweite Widerstand ist.

公开(公告)号：DE502004003175D1

公开(公告)日：2007-04-19

申请号：DE502004003175

申请日：2004-09-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HELNEDER JOHANN ,  SCHWERD MARKUS ,  GOEBEL THOMAS ,  MITCHELL ANDREA ,  KOERNER HEINRICH ,  HOMMEL MARTINA

IPC: H01L21/768 ,  H01L23/532

Abstract: A multifunctional dielectric layer can be formed on a substrate, especially on an exposed metallic strip conductor system on a substrate. An additional metal layer is formed across the surface of the exposed metal strip conductors. The metal layer is then at least partially converted to a nonconducting metal oxide, the dielectric layer.

公开(公告)号：DE10337569A1

公开(公告)日：2005-03-24

申请号：DE10337569

申请日：2003-08-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HELNEDER JOHANN ,  GOEBEL THOMAS ,  SCHWERD MARKUS ,  MITCHELL ANDREA ,  KOERNER HEINRICH ,  SECK MARTIN ,  DREXL STEFAN ,  KLEIN WOLFGANG ,  HOMMEL MARTINA

IPC: H01L23/485 ,  H01L23/532 ,  H01L23/522 ,  H01L21/768

Abstract: A connection arrangement having an outer conductive structure arranged at least partly or completely in a cutout of an electrical insulation layer is provided. An inner conductive structure is arranged at the bottom of the cutout on one side of the insulation layer. The inner conductive structure adjoins the outer conductive structure in a contact zone. A contact area is arranged at the outer conductive structure on the other side of the cutout. The contact zone and the contact area do not overlap. The bottom of the cutout is arranged to overlaps at least half of the contact area, to provide a step in the insulation layer at the edge of the cutout outside a main current path between the contact area and the inner conductive structure.

公开(公告)号：DE10337569B4

公开(公告)日：2008-12-11

申请号：DE10337569

申请日：2003-08-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HELNEDER JOHANN ,  GOEBEL THOMAS ,  SCHWERD MARKUS ,  MITCHELL ANDREA ,  KOERNER HEINRICH ,  SECK MARTIN ,  DREXL STEFAN ,  KLEIN WOLFGANG ,  HOMMEL MARTINA

IPC: H01L23/522 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/485 ,  H01L23/532

Abstract: A connection arrangement having an outer conductive structure arranged at least partly or completely in a cutout of an electrical insulation layer is provided. An inner conductive structure is arranged at the bottom of the cutout on one side of the insulation layer. The inner conductive structure adjoins the outer conductive structure in a contact zone. A contact area is arranged at the outer conductive structure on the other side of the cutout. The contact zone and the contact area do not overlap. The bottom of the cutout is arranged to overlaps at least half of the contact area, to provide a step in the insulation layer at the edge of the cutout outside a main current path between the contact area and the inner conductive structure.

公开(公告)号：DE10341059B4

公开(公告)日：2007-05-31

申请号：DE10341059

申请日：2003-09-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HELNEDER JOHANN ,  SCHWERD MARKUS ,  GOEBEL THOMAS ,  MITCHELL ANDREA ,  KOERNER HEINRICH ,  SECK MARTIN ,  TORWESTEN HOLGER

IPC: H01L27/08 ,  H01G9/042 ,  H01L21/02 ,  H01L21/316 ,  H01L21/822 ,  H01L23/522 ,  H01L27/01 ,  H01L27/06

Abstract: An integrated circuit and fabrication method are presented. The integrated circuit includes a capacitor containing a base electrode, a covering electrode, and a dielectric between the base and covering electrodes. The dielectric contains an oxide of a material contained in the base electrode, which may be produced by anodic oxidation. A peripheral edge of the dielectric is uncovered by the covering electrode. A base layer on the capacitor includes a cutout adjacent to the dielectric. During fabrication, the base layer protects the material of the base electrode that is to be anodically oxidized from chemicals, and also protects the surrounding regions from anodic oxidation. A precision resistor may be fabricated simultaneously with the capacitor.

公开(公告)号：DE10344389A1

公开(公告)日：2005-05-19

申请号：DE10344389

申请日：2003-09-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HELNEDER JOHANN ,  SCHWERD MARKUS ,  GOEBEL THOMAS ,  MITCHELL ANDREA ,  KOERNER HEINRICH ,  HOMMEL MARTINA

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/316 ,  H01L21/822

Abstract: A multifunctional dielectric layer can be formed on a substrate, especially on an exposed metallic strip conductor system on a substrate. An additional metal layer is formed across the surface of the exposed metal strip conductors. The metal layer is then at least partially converted to a nonconducting metal oxide, the dielectric layer.