Multi-layer integrated circuit includes substrate with stacked circuit planes and integrates high quality passive components in its three-dimensional structure

    公开(公告)号:DE102005045060A1

    公开(公告)日:2007-03-22

    申请号:DE102005045060

    申请日:2005-09-21

    Abstract: The substrate (20) integrates semiconductor components. There are three circuit planes. These are designated close, intermediate or remote, with respect to the substrate, i.e. their spacing from the substrate increases with each layer. Each circuit plane contains a planar base surface and a planar covering surface adjoining a dielectric. The base surface of the circuit plane remote from the substrate (76), extends in a plane occupied by the covering surface of the intermediate circuit plane. Alternatively the base surface of the circuit plane remote from the substrate, extends in a plane lying closer to the substrate than a plane occupied by the covering surface of the intermediate circuit plane. In addition, the base surface of the intermediate circuit plane extends in a plane occupied by the covering surface of the circuit plane near the substrate. Alternatively the base surface of the intermediate circuit plane extends in a plane closer to the substrate than that occupied by the covering surface of the circuit plane close to the substrate. Circuit elements in the structure are further elaborated. A component formed by the elements (A-G), comprises one, two or more windings of a coil, a side wall of a coaxial line or parts of a condenser exceeding 10 mu m or 50 mu m in length. Salient features include use of aluminum or copper to form the tracks (34-38), at 60 atom% concentrations. They form internal conductors of the circuit (10). An even more remote conductive structure is included. One or more further circuit planes are included between the substrate and the circuit plane closest to it. An independent claim is also included for the method of manufacture.

    9.
    发明专利
    未知

    公开(公告)号:DE102005045060B4

    公开(公告)日:2007-07-05

    申请号:DE102005045060

    申请日:2005-09-21

    Abstract: The substrate (20) integrates semiconductor components. There are three circuit planes. These are designated close, intermediate or remote, with respect to the substrate, i.e. their spacing from the substrate increases with each layer. Each circuit plane contains a planar base surface and a planar covering surface adjoining a dielectric. The base surface of the circuit plane remote from the substrate (76), extends in a plane occupied by the covering surface of the intermediate circuit plane. Alternatively the base surface of the circuit plane remote from the substrate, extends in a plane lying closer to the substrate than a plane occupied by the covering surface of the intermediate circuit plane. In addition, the base surface of the intermediate circuit plane extends in a plane occupied by the covering surface of the circuit plane near the substrate. Alternatively the base surface of the intermediate circuit plane extends in a plane closer to the substrate than that occupied by the covering surface of the circuit plane close to the substrate. Circuit elements in the structure are further elaborated. A component formed by the elements (A-G), comprises one, two or more windings of a coil, a side wall of a coaxial line or parts of a condenser exceeding 10 mu m or 50 mu m in length. Salient features include use of aluminum or copper to form the tracks (34-38), at 60 atom% concentrations. They form internal conductors of the circuit (10). An even more remote conductive structure is included. One or more further circuit planes are included between the substrate and the circuit plane closest to it. An independent claim is also included for the method of manufacture.

Patent Agency Ranking