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公开(公告)号:DE112004001321T5
公开(公告)日:2006-06-01
申请号:DE112004001321
申请日:2004-07-02
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HILLINGER ANDREAS , LIAN JINGYU , NAGEL NICOLAS , BRUCHHAUS RAINER , GERNHARDT STEPHAN , WELLHAUSEN UWE , MOON BUM-KI , HORNIK KARL
IPC: H01L21/02 , H01G4/06 , H01G4/12 , H01G4/33 , H01L21/8246 , H01L27/115
Abstract: A multi-layer barrier for a ferroelectric capacitor includes an outdiffusion barrier layer permeable to both hydrogen and oxygen. The outdiffusion barrier layer covers the ferroelectric of the capacitor. Oxygen passes through the outdiffusion barrier layer into the ferroelectric during an oxygen anneal in order to repair damage to the ferroelectric caused during etching. The outdiffusion barrier layer reduces the decomposition of the ferroelectric by blocking molecules leaving the ferroelectric during the oxygen anneal. The multi-layer barrier also includes a hydrogen barrier layer deposited on the outdiffusion barrier layer after repair of the ferroelectric by the oxygen anneal. The hydrogen barrier layer allows the multi-layer barrier to block the passage of hydrogen into the ferroelectric during back-end processes.
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公开(公告)号:AU2003298198A8
公开(公告)日:2004-07-22
申请号:AU2003298198
申请日:2003-12-17
Applicant: INFINEON TECHNOLOGIES AG
Inventor: LIAN JINGYU , WELLHAUSEN UWE , BRUCHHAUS RAINER , GERNHARDT STEFAN , HILLIGER ANDREAS , NAGEL NICOLAS
IPC: H01L21/8246 , H01L23/00 , H01L21/02 , H01L21/8239 , H01L21/84 , H01L27/105
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公开(公告)号:DE10356097A1
公开(公告)日:2004-06-17
申请号:DE10356097
申请日:2003-11-27
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WELLHAUSEN UWE , BRUCHHAUS RAINER , NAGEL NICOLAS , GERNHARDT STEFAN , LIAN JENNY , HILLIGER ANDREAS
IPC: H01L21/02 , H01L21/768 , H01L27/105 , H01L21/8239
Abstract: The invention includes a wafer having a poly silicon plug passing through a CP-contact. The poly silicon plug is formed from a relatively heavily doped poly silicon layer and a relatively lightly doped poly silicon layer. The relatively lightly doped poly silicon layer passes through the relatively heavily doped poly silicon layer to extend beyond the relatively heavily doped poly silicon layer towards the surface of the wafer. A barrier layer covers top and side walls of the relatively lightly doped poly silicon layer for reducing oxidation at the surface of the poly silicon plug. The wafer is fabricated by depositing a relatively heavily doped poly silicon layer in a CP-contact, depositing a relatively lightly doped poly silicon layer to pass through the relatively heavily doped poly silicon layer, and depositing a barrier layer to cover top and side walls of the relatively lightly doped poly silicon layer to reduce oxidation at the surface of the poly silicon plug.
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公开(公告)号:DE10131625A1
公开(公告)日:2003-01-23
申请号:DE10131625
申请日:2001-06-29
Applicant: INFINEON TECHNOLOGIES AG
Inventor: KROENKE MATTHIAS , BRUCHHAUS RAINER , ENDERS GERHARD , HARTNER WALTER , MIKOLAJICK THOMAS , NAGEL NICOLAS , ROEHNER MICHAEL
IPC: H01L27/105 , H01L21/02 , H01L27/115 , H01L27/11502 , H01L21/8239
Abstract: A method for manufacturing a semiconductor storage device, in which a semiconductor substrate or similar, a passivation zone (21) and/or a surface zone (20a, 21a) are formed on it with a CMOS structure and in which in the region of the semiconductor substrate (20) a passivation zone (21) and/or a surface zone (20a, 21a) on it are formed a capacitor arrangement (2) of capacitor devices (10-1...10-4) serving as storage elements. At least one part of the capacitor devices (10-1...10-4) are formed with a number of mutually-parallel connected discrete capacitors (C1,C2).
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公开(公告)号:DE10065663A1
公开(公告)日:2002-07-11
申请号:DE10065663
申请日:2000-12-29
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHNABEL FLORIAN , ROEHNER MICHAEL , KASKO IGOR , NAGEL NICOLAS
IPC: H01L21/02 , H01L21/768 , H01L23/00 , H01L23/26 , H01L21/283 , H01L27/108
Abstract: Semiconductor switching arrangement comprises a semiconductor substrate (18); a contact element (14) formed in one region on the substrate; and a contact region (16). Edge regions, side regions, boundary layers or boundary surfaces are formed in a region of the contact region for receiving components. Diffusion of the components during processing and/or operation is reduced along the edge regions, side regions, boundary layers or boundary surfaces. An Independent claim is also included for a process for the production of the semiconductor switching arrangement. Preferred Features: A barrier region (15) is formed between the contact element and the contact region to form a partial screen.
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公开(公告)号:DE19958200A1
公开(公告)日:2001-06-13
申请号:DE19958200
申请日:1999-12-02
Applicant: INFINEON TECHNOLOGIES AG
Inventor: NAGEL NICOLAS , PRIMIG ROBERT , KASKO IGOR , BRUCHHAUS RAINER
IPC: H01L21/02 , H01L21/285 , H01L21/8242 , H01L23/532 , H01L21/321 , H01L27/105
Abstract: Microelectronic structure comprises an adhesion layer (20) arranged between a base substrate (5) and a barrier layer (25). The adhesion layer contains titanium, zirconium, hafnium, cerium, tantalum, vanadium, chromium, niobium, tantalum nitride, titanium nitride, tantalum silicide nitride and/or tungsten silicide. An Independent claim is also included for a process for the production of a microelectronic structure comprising applying an adhesion layer to the substrate by sputtering or CVD, and then applying the barrier layer to the adhesion layer. Preferred Features: The substrate consists partially of an insulating material and has an opening filled with conducting material.
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公开(公告)号:DE102006017282A1
公开(公告)日:2007-10-04
申请号:DE102006017282
申请日:2006-04-12
Applicant: INFINEON TECHNOLOGIES AG
Inventor: NAGEL NICOLAS , KUESTERS KARL-HEINZ , WILLER JOSEF , MIKOLAJICK THOMAS
IPC: H01L27/115 , G11C16/04
Abstract: The method involves changing threshold voltage of a charge-trapping-unit that includes a channel region (2), gate electrode (3), and a charge-trapping-layer (4) between the channel region and the electrode. Voltage is applied between the electrode and the channel region. Current of two sets of charge carriers is respectively generated from the channel region and the electrode in the charge-trapping layer. The current generation is stopped, if the amount of current intensity of one carrier is larger than the amount of the current intensity of the other carrier. An independent claim is also included for a semiconductor memory unit with a channel region and a gate electrode.
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公开(公告)号:DE19860080B4
公开(公告)日:2007-03-29
申请号:DE19860080
申请日:1998-12-23
Applicant: INFINEON TECHNOLOGIES AG
Inventor: NAGEL NICOLAS , PRIMIG ROBERT , KASKO IGOR , BRUCHHAUS RAINER
IPC: H01L23/522 , H01L21/02 , H01L21/285 , H01L23/532
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公开(公告)号:DE10349747B4
公开(公告)日:2007-02-15
申请号:DE10349747
申请日:2003-10-23
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WELLHAUSEN UWE , BRUCHHAUS RAINER , NAGEL NICOLAS , GERNHARDT STEFAN
IPC: H01L21/321 , H01L21/316 , H01L21/82 , H01L21/8239
Abstract: An layer for a structure such as a ferro-capacitor is formed by a three stage process consisting of (i) applying a wetting layer 23 over some or all of the structure 21, (ii) applying a second layer 25 of a second material over the wetting layer 23, and (iii) transforming the second material by a chemical reaction. In an example, the second material is Al, and step (iii) inclues oxidising the Al layer 25 to form an Al2O3 layer 27. The wetting layer 21 is preferably applied by a process having good step coverage even in high aspect regions of the substrate, even though that process may have a low deposition rate. The wetting layer 21 is preferably formed of a material over which the second material has a high mobility, so that the aluminium layer-and the subsequent Al2O3 layer-are relatively uniform in thickness. Step (iii) may be preceded by a step of enhancing lateral mobility of the second material, e.g. by a heat treatment.
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公开(公告)号:DE10131492B4
公开(公告)日:2006-09-14
申请号:DE10131492
申请日:2001-06-29
Applicant: INFINEON TECHNOLOGIES AG
Inventor: BRUCHHAUS RAINER , ENDERS GERHARD , HARTNER WALTER , KROENKE MATTHIAS , MIKOLAJICK THOMAS , NAGEL NICOLAS , ROEHNER MICHAEL
IPC: H01L21/8239 , G11C7/00 , H01L21/02 , H01L21/8242 , H01L21/8246 , H01L27/105 , H01L27/115 , H01L27/11502 , H01L27/11507
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