公开(公告)号：US07846829B2

公开(公告)日：2010-12-07

申请号：US12196210

申请日：2008-08-21

Applicant: Junji Tanaka ,  Masahiko Harayama ,  Masanori Onodera

Inventor： Junji Tanaka ,  Masahiko Harayama ,  Masanori Onodera

IPC: H01L21/44 ,  H01L23/52 ,  H01L23/48 ,  H01L29/40 ,  H01L23/485 ,  H01L23/498

CPC classification number: H05K3/38 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2225/06568 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/20752 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2201/1025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device is provided that includes a semiconductor chip, a plurality of solder bumps that electrically couple the semiconductor chip to the outside, and a metal bump being provided on the surface of each first solder bump which is at least a part of the plurality of solder bumps and being made of a metal having a melting point higher than that of the first solder bump. The wettability of the first solder bump is improved as each metal bump serves as a core when the corresponding first solder bump melts. Thus, the connection reliability of the first solder bump can be improved.

Abstract translation: 提供了一种半导体器件，其包括半导体芯片，将半导体芯片电耦合到外部的多个焊料凸块以及设置在每个第一焊料凸块的表面上的金属凸块，该第一焊料凸块是至少部分多个 焊料凸起并且由熔点高于第一焊料凸点的金属制成。 当相应的第一焊料凸块熔化时，每个金属凸块用作芯时，第一焊料凸块的润湿性得到改善。 因此，可以提高第一焊料凸块的连接可靠性。

公开(公告)号：US20030087477A1

公开(公告)日：2003-05-08

申请号：US10317384

申请日：2002-12-12

Inventor： Tomohiro Kawashima

IPC: H01L021/48

CPC classification number: H01L24/10 ,  H01L21/563 ,  H01L23/3114 ,  H01L23/49827 ,  H01L24/13 ,  H01L2221/68377 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H05K3/3436 ,  H05K2201/1025 ,  H05K2201/10378 ,  H05K2203/0369 ,  H05K2203/0384 ,  Y02P70/613 ,  H01L2924/00

Abstract: First, there are prepared a semiconductor chip with a group of solder bumps disposed on and joined to a surface thereof in a predetermined pattern, and a multilayer plate including a second layer as an electrically conductive layer and first and third layers disposed on respective opposite surfaces of the second layer and comprising metal layers of one metal. Then, the first layer and the third layer of the multilayer plate are etched in a predetermined pattern to form a first group of posts and a second group of posts which have a pattern identical to the pattern of the group of solder bumps. Then, semiconductor chip is positioned to hold the solder bumps in contact with the posts of the first group, and the solder bumps are melted to join the solder bumps to the posts of the first group. Thereafter, the second layer is cut between the posts of the first and second groups, producing separate multilayer posts.

Abstract translation: 首先，准备具有以规定图案配置在其表面上并与其接合的一组焊料凸块的半导体芯片，以及包括作为导电层的第二层的多层板和设置在相应的相对表面上的第一和第三层 的第二层并且包括一种金属的金属层。 然后，以预定图案蚀刻多层板的第一层和第三层，以形成具有与该组焊料组的图案相同的图案的第一组柱和第二组柱。 然后，将半导体芯片定位成保持与第一组的柱接触的焊料凸块，并且焊料凸块熔化以将焊料凸块接合到第一组的柱。 此后，在第一组和第二组的柱之间切割第二层，产生单独的多层柱。

公开(公告)号：US06493238B1

公开(公告)日：2002-12-10

申请号：US09846554

申请日：2001-04-30

Applicant: Deepak K. Pai

Inventor： Deepak K. Pai

IPC: H01R900

CPC classification number: H01L24/81 ,  H01L24/14 ,  H01L24/17 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13017 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/141 ,  H01L2224/14141 ,  H01L2224/81101 ,  H01L2224/81194 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/30107 ,  H01R4/024 ,  H05K3/3436 ,  H05K2201/09418 ,  H05K2201/1025 ,  Y02P70/613 ,  H01L2224/05599

Abstract: A method and system of utilizing inexpensively manufactured, electrically conductive and mechanically compliant disks to interconnect an area grid array (“AGA”) chip to a printed wiring board. The conductive disk shaped leads are stamped from a thin sheet of conductive material. To increase solderability and protect the disk surface, the disks can be plated with tin or an equivalent material. Each disk is positioned tangent to the surface of an AGA chip in a specific orientation. One edge of each disk is electrically connected and mechanically secured to a corresponding conductive pad located on the surface of the AGA chip. The opposite edge of each conductive disk is positioned to align with a corresponding conductive surface pad on a printed wiring board (“PWB”). Each opposite edge is electrically connected and mechanically secured to the surface of the PWB, thereby establishing a compliant electrical connection between the AGA chip and the PWB.

Abstract translation: 利用廉价制造的导电和机械柔性盘以将区域格栅阵列（“AGA”）芯片互连到印刷线路板的方法和系统。 导电盘形引线由导电材料薄片冲压。 为了增加可焊性和保护磁盘表面，磁盘可以镀锡或同等材料。 每个盘以特定取向与AGA芯片的表面相切。 每个盘的一个边缘电连接并且机械地固定到位于AGA芯片的表面上的对应的导电焊盘。 每个导电盘的相对边缘被定位成与印刷线路板（“PWB”）上的对应的导电表面焊盘对准。 每个相对边缘电连接并机械固定到PWB的表面，从而在AGA芯片和PWB之间建立顺应的电连接。

公开(公告)号：US06278184B1

公开(公告)日：2001-08-21

申请号：US09400783

申请日：1999-09-22

Applicant: Peter J. Brofman ,  Patrick A. Coico ,  Mark G. Courtney ,  Lewis S. Goldmann ,  Raymond A. Jackson ,  William E. Sablinski ,  Kathleen A. Stalter ,  Hilton T. Toy ,  Li Wang

Inventor： Peter J. Brofman ,  Patrick A. Coico ,  Mark G. Courtney ,  Lewis S. Goldmann ,  Raymond A. Jackson ,  William E. Sablinski ,  Kathleen A. Stalter ,  Hilton T. Toy ,  Li Wang

IPC: H01L2348

CPC classification number: H01L24/12 ,  B23K1/0016 ,  B23K2101/42 ,  H01L23/10 ,  H01L23/50 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K3/3436 ,  H05K2201/1025 ,  H05K2201/10992 ,  H05K2203/0415 ,  Y02P70/613 ,  Y10T29/49144 ,  H01L2924/00

Abstract: A solder preform is provided for forming interconnections between multilayer ceramic substrates comprising an upper layer and lower layer of solder separated by an intermediate layer of a material which is wettable by solder and which does not melt at the temperatures used to reflow the solder and form the connections. The solder preform is used to join the substrates and is particularly useful to simultaneously electrically interconnect the substrates and to form a hermetic seal between the substrates being joined.

公开(公告)号：US6070321A

公开(公告)日：2000-06-06

申请号：US890458

申请日：1997-07-09

Applicant: Peter J. Brofman ,  Patrick A. Coico ,  Mark G. Courtney ,  Lewis S. Goldmann ,  Raymond A. Jackson ,  William E. Sablinski ,  Kathleen A. Stalter ,  Hilton T. Toy ,  Li Wang

Inventor： Peter J. Brofman ,  Patrick A. Coico ,  Mark G. Courtney ,  Lewis S. Goldmann ,  Raymond A. Jackson ,  William E. Sablinski ,  Kathleen A. Stalter ,  Hilton T. Toy ,  Li Wang

IPC: B23K1/00 ,  B23K35/14 ,  H01L21/60 ,  H01L23/10 ,  H01L23/50 ,  H05K3/34

CPC classification number: H01L24/12 ,  B23K1/0016 ,  H01L23/10 ,  H01L23/50 ,  H01L24/16 ,  H01L24/81 ,  H05K3/3436 ,  B23K2201/42 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K2201/1025 ,  H05K2201/10992 ,  H05K2203/0415 ,  Y02P70/613 ,  Y10T29/49144

Abstract: A solder preform is provided for forming interconnections between multilayer ceramic substrates comprising an upper layer and lower layer of solder separated by an intermediate layer of a material which is wettable by solder and which does not melt at the temperatures used to reflow the solder and form the connections. The solder preform is used to join the substrates and is particularly useful to simultaneously electrically interconnect the substrates and to form a hermetic seal between the substrates being joined.

Abstract translation: 提供焊料预成型件，用于在多层陶瓷基片之间形成互连，包括上层和下层焊料，该材料由可由焊料润湿的材料的中间层分开，并且在用于回流焊料的温度下不熔化，形成 连接。 焊料预成型件用于连接基板，并且特别可用于同时电连接基板并且在被接合的基板之间形成气密密封。

公开(公告)号：US6066808A

公开(公告)日：2000-05-23

申请号：US058908

申请日：1998-04-10

Applicant: John Steven Kresge ,  David Noel Light

Inventor： John Steven Kresge ,  David Noel Light

IPC: H05K3/34 ,  H05K1/11 ,  H05K3/00 ,  H05K3/40 ,  H05K3/46 ,  H01R9/09

CPC classification number: H05K3/4015 ,  H05K1/113 ,  H05K2201/0376 ,  H05K2201/096 ,  H05K2201/1025 ,  H05K2203/0278 ,  H05K2203/1394 ,  H05K3/0094 ,  H05K3/4007 ,  H05K3/4614 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: Pads which are attached to a high density printed circuit board (PCB) having a plurality of through-holes opening on the top surface. A plurality of pads are formed on a carrier sheet so that each of the pads have a copper layer proximate to the carrier sheet and a joining metal layer formed on top of said copper layer. The plurality of pads are positioned on the carrier sheet so that they are aligned with the through-hole pattern on the top surface of the PCB, the pads bing laminated to the through-holes on the top surface using the joining metal, and the carrier sheet being separated from the plurality of pads that are joined to the through-holes so that the copper layer is exposed. The pads may possess a variety of shapes such as disk-shaped, elongated, or rectangular, and can cover one or multiple through-holes. An electrical component may be soldered to the pad. The pad and through-hole may be compressed so that the top surface of the pad is even (flush) with the top surface of an external dielectric surface.

Abstract translation: 连接到具有在顶表面上开口的多个通孔的高密度印刷电路板（PCB）的垫。 多个焊盘形成在载体片上，使得每个焊盘具有靠近载体片的铜层和形成在所述铜层顶部上的接合金属层。 多个焊盘定位在载体片上，使得它们与PCB的顶表面上的通孔图案对准，使用接合金属将衬垫层压到顶表面上的通孔，并且载体 片与从连接到通孔的多个焊盘分开，以使铜层露出。 垫可以具有各种形状，例如盘形，细长或矩形，并且可以覆盖一个或多个通孔。 电气部件可以焊接到焊盘。 垫和通孔可以被压缩，使得垫的顶表面与外部电介质表面的顶表面均匀（齐平）。

公开(公告)号：US4402450A

公开(公告)日：1983-09-06

申请号：US295043

申请日：1981-08-21

Applicant: Bruce C. Abraham ,  Charles R. Fegley

Inventor： Bruce C. Abraham ,  Charles R. Fegley

IPC: B23K3/06 ,  H05K3/34 ,  B23K1/12

CPC classification number: B23K3/06 ,  H05K3/3436 ,  H05K3/3478 ,  H05K2201/0305 ,  H05K2201/1025 ,  H05K2201/1028 ,  H05K2201/10424 ,  H05K2201/10727 ,  H05K2203/033 ,  H05K2203/0405 ,  H05K2203/041 ,  H05K2203/0415 ,  H05K3/3442 ,  Y02P70/613

Abstract: Contact pads (18) of a device (12) are adapted for bonding components such as contacts of a circuit assembly thereto. At least two of the pads (18) are interconnected with a member (34) containing bonding material. Portions of the member (34) lying adjacent the pads (18) are then removed to form isolated bodies (42) containing bonding material on the pads (18). The member (37) may be of a composite structure containing bonding material associated with a hard element (61). The bodies (42) formed therefrom contain a hard element portion (62) having dimensions which remain substantially unchanged to define a desired minimum distance between respective pads (18) and contacts when they are bonded together.

Abstract translation: 设备（12）的接触焊盘（18）适于将诸如电路组件的触点的组件粘合到其上。 至少两个焊盘（18）与包含接合材料的构件（34）互连。 然后移除位于焊盘（18）附近的部件（34）的部分，以形成在焊盘（18）上包含结合材料的隔离体（42）。 构件（37）可以是包含与硬质元件（61）相关联的接合材料的复合结构。 由此形成的主体（42）包含具有保持基本上不变的尺寸的硬元件部分（62），以便当它们结合在一起时在相应的焊盘（18）和触点之间限定期望的最小距离。

公开(公告)号：US20070193773A1

公开(公告)日：2007-08-23

申请号：US11425442

申请日：2006-06-21

Applicant: Chi-Chen Cheng ,  Chi-Chung Lo

Inventor： Chi-Chen Cheng ,  Chi-Chung Lo

IPC: H05K1/16

CPC classification number: H05K1/0204 ,  H05K1/189 ,  H05K3/281 ,  H05K3/305 ,  H05K2201/0209 ,  H05K2201/0989 ,  H05K2201/10106 ,  H05K2201/1025 ,  H05K2201/10689

Abstract: A flexible printed circuit (FPC) and electronic component assembly. The FPC comprises a first protective layer having a first opening, a main layer on the first protective layer, and a second protective layer having a second opening exposing the main layer. The heat produced from the electronic component can be transmitted to the main layer by a heat-conductive medium between the electronic component and the main layer, and can be diffused via the first opening.

Abstract translation: 柔性印刷电路（FPC）和电子部件组件。 FPC包括具有第一开口的第一保护层，第一保护层上的主层，以及具有暴露主层的第二开口的第二保护层。 由电子部件产生的热量可以通过电子部件和主体层之间的导热介质传输到主层，并且可以经由第一开口扩散。

公开(公告)号：US06912780B2

公开(公告)日：2005-07-05

申请号：US10860427

申请日：2004-06-03

Applicant: Bruce John Chamberlin ,  Mark Kenneth Hoffmeyer ,  Wai Mon Ma ,  Arch Nuttall ,  James R. Stack

Inventor： Bruce John Chamberlin ,  Mark Kenneth Hoffmeyer ,  Wai Mon Ma ,  Arch Nuttall ,  James R. Stack

IPC: H01R12/00 ,  H05K1/11 ,  H05K3/22 ,  H05K3/40 ,  H05K3/42 ,  H01K3/10

CPC classification number: H05K3/4046 ,  H05K1/112 ,  H05K3/225 ,  H05K3/429 ,  H05K2201/1025 ,  H05K2201/10287 ,  H05K2201/10871 ,  H05K2203/0242 ,  H05K2203/175 ,  Y10T29/49165 ,  Y10T29/49167

Abstract: A method to replace an electrical interface on a printed circuit board having a plurality of contact pads on a top surface, the contact pads being connected to conducting material extending through said circuit board. For the contact pad being replaced, drilling a hole through said printed circuit board at that location, and removing any remaining conductor material attached to the contact pad on the top board surface. Providing a replacement conductor/contact pad structure having a generally T-configuration with a stem and a head that completely surrounds the stem, wherein said head has a diameter greater than the diameter of the drilled hole. Inserting the replacement conductor/contact pad into the hole with said stem extending beyond the second surface of the board with the bottom surface of the head being in contact with the first surface of said board. A replacement conductor/contact pad on repaired board is also described.

Abstract translation: 一种替代在顶表面上具有多个接触焊盘的印刷电路板上的电接口的方法，所述接触焊盘连接到延伸穿过所述电路板的导电材料。 对于更换的接触垫，在该位置穿过所述印刷电路板钻一个孔，并且去除附着在顶板表面上的接触垫上的剩余的导体材料。 提供具有大致T形结构的替换导体/接触垫结构，其具有完全围绕所述杆的杆和头部，其中所述头部的直径大于所述钻孔的直径。 将替换的导体/接触垫插入孔中，其中所述杆延伸超过板的第二表面，并且头的底表面与所述板的第一表面接触。 修理板上的替换导体/接触垫也被描述。

公开(公告)号：US20020171152A1

公开(公告)日：2002-11-21

申请号：US10147903

申请日：2002-05-20

Applicant: NEC CORPORATION

Inventor： Takashi Miyazaki

IPC: H01L023/48 ,  H01L023/52 ,  H01L029/40

CPC classification number: H01L21/568 ,  H01L21/563 ,  H01L23/3107 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05571 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/12105 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/75252 ,  H01L2224/75743 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H05K3/3436 ,  H05K3/3463 ,  H05K2201/0379 ,  H05K2201/1025 ,  H05K2201/10977 ,  H05K2201/10992 ,  H05K2203/0338 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2224/05111

Abstract: There are provided a flip-chip-type semiconductor device and a manufacturing method thereof that can sufficiently reduce stress generated in the connecting portions between a semiconductor chip and a mounting substrate, and can achieve excellent mounting reliability. A pad electrode is selectively formed on the surface of a semiconductor chip, conductive post including at least two conductive layers, which have different materials each other, on the pad electrode, and bump electrode is formed on the conductive post. The bump electrode is connected to a mounting substrate, and the pad electrode is electrically connected to the mounting substrate. The conductive post is formed by forming first conductive layer and second conductive layer on the first conductive layer selectively on a base material (temporary substrate), electrically connecting the first and second conductive layers to the pad electrode, and thereafter separating the temporary substrate from the first conductive layer.

Abstract translation: 提供了可以充分减少在半导体芯片和安装基板之间的连接部分产生的应力的倒装芯片型半导体器件及其制造方法，并且可以实现优良的安装可靠性。 在焊盘电极上，在半导体芯片的表面上选择性地形成焊盘电极，所述导电柱包括至少两个具有不同材料的导电层，并且在导电柱上形成凸起电极。 凸起电极连接到安装基板，并且焊盘电极电连接到安装基板。 导电柱通过在第一导电层上选择性地在基材（临时基板）上形成第一导电层和第二导电层，将第一和第二导电层电连接到焊盘电极，然后将临时基板从 第一导电层。