公开(公告)号：EP3345248A1

公开(公告)日：2018-07-11

申请号：EP16842470.3

申请日：2016-06-22

Applicant: R&D Circuits Inc.

Inventor： WARWICK, Thomas, P. ,  TURPUSEEMA, Dhananjaya ,  RUSSELL, James, V.

IPC: H01R12/00 ,  B33Y80/00 ,  H01R13/02 ,  H05K1/14 ,  H05K3/36 ,  H01L23/522 ,  H01L23/535

CPC classification number: H01R12/52 ,  H01L23/522 ,  H01L23/5225 ,  H01L23/535 ,  H05K1/185 ,  H05K3/4046 ,  H05K2201/09118 ,  H05K2201/10287

Abstract: The present invention provides for a method and structure for forming three-dimensionally routed dielectric wires between discrete points on the two or more parallel circuit planes. The wires may be freely routed in three-dimensional space as to create the most efficient routing between the two arbitrarily defined points on the two or more parallel circuit planes. Metalizing the outer surfaces of these three dimensional dielectric wires electrically coupling the discrete wires to their respective discrete contact points. Two or more of these wires may be in intimate contact to one another electrically coupling to each other as well as to two or more discrete contact pads. These electrically coupled contact pads may be on opposite sides or on the same side of the structure and the formed metalized wires may originate on one side and terminate on the other or originate and terminate from the same side

公开(公告)号：EP2798702A4

公开(公告)日：2015-08-26

申请号：EP13777883

申请日：2013-03-28

Applicant: R & D CIRCUITS INC

Inventor： WARWICK THOMAS P ,  RUSSELL JAMES V ,  MCMULLIN DERMICK ,  QUICK WILLIAM

IPC: H01R13/24 ,  H01R12/52

CPC classification number: H01R13/03 ,  H01R12/52 ,  H01R13/2414 ,  H01R43/26 ,  Y10T29/49208 ,  Y10T29/4921

公开(公告)号：EP2428105A4

公开(公告)日：2013-05-29

申请号：EP10772351

申请日：2010-01-08

Applicant: R & D CIRCUITS INC

Inventor： RUSSELL JAMES V

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K1/185 ,  H05K1/023 ,  H05K1/0231 ,  H05K1/0234 ,  H05K1/112 ,  H05K3/4046 ,  H05K2201/096 ,  H05K2201/10636 ,  Y02P70/611

公开(公告)号：EP2893783A4

公开(公告)日：2016-08-24

申请号：EP13834789

申请日：2013-08-09

Applicant: R&D CIRCUITS INC

Inventor： TURPUSEEMA DAN ,  RUSSELL JAMES V

IPC: H05K3/06 ,  H01L21/02 ,  H05K1/02

CPC classification number: H05K3/425 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0094 ,  H05K3/243 ,  H05K3/4007 ,  H05K3/427 ,  H05K2201/0959 ,  Y10T29/49156

公开(公告)号：EP2225802A2

公开(公告)日：2010-09-08

申请号：EP08863567.7

申请日：2008-12-17

Applicant: R&D Circuits Inc.

Inventor： RUSSELL, James, V.

IPC: H01R12/16 ,  H01R4/58

CPC classification number: H01R13/2414 ,  H01R4/58 ,  H01R13/03 ,  H05K3/245 ,  H05K3/326 ,  H05K2201/0314 ,  H05K2201/10719

Abstract: An electrical connector using an isotropic conductive elastomer as the interconnect medium.

公开(公告)号：EP2798702A1

公开(公告)日：2014-11-05

申请号：EP13777883.3

申请日：2013-03-28

Applicant: R&D Circuits Inc.

Inventor： WARWICK, Thomas, P. ,  RUSSELL, James, V. ,  MCMULLIN, Dermick ,  QUICK, William

IPC: H01R12/00

CPC classification number: H01R13/03 ,  H01R12/52 ,  H01R13/2414 ,  H01R43/26 ,  Y10T29/49208 ,  Y10T29/4921

Abstract: A method and an electrical interconnect mechanism in which elastomeric pins are printed onto metal retainer tabs having at least one protrusion or tab extending laterally therefrom to engage a catch or recess of the laminated housing so as to locate each of the elastomeric pins and secure them within the housing. In one embodiment a champher may be employed with a catch or recess to engagely secure a second protrusion or tab extending laterally from another side of said elastomeric pin. In another embodiment the elastomeric pin may have a solid metal ring or a slide collar around the center of the pin wherein the ring has one or two tabs for engaging the recess in the housing and if preferred also the recess of a champfer.

公开(公告)号：EP2428105A1

公开(公告)日：2012-03-14

申请号：EP10772351.2

申请日：2010-01-08

Applicant: R&D Circuits Inc.

Inventor： RUSSELL, James, V.

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K1/185 ,  H05K1/023 ,  H05K1/0231 ,  H05K1/0234 ,  H05K1/112 ,  H05K3/4046 ,  H05K2201/096 ,  H05K2201/10636 ,  Y02P70/611

Abstract: The present disclosure relates to embedding a power modification component such as a capacitance or a resistance inside of pads that are located to extend over and beyond the vias of the PCB so that a portion of the pad containing the embedded capacitance or resistance is located beyond where the vias or blinds are located. Each of the pads will include an opening that is located over a given one of the vias or blinds to permit that via to conduct through the opening. In this way the capacitance and the resistance will have a closer contact point the electrical component.

公开(公告)号：EP3304110A1

公开(公告)日：2018-04-11

申请号：EP16803876.8

申请日：2016-02-26

Applicant: R&D Circuits Inc.

Inventor： WARWICK, Thomas, P. ,  RUSSELL, James, V. ,  TURPUSEEMA, Dhananjaya

IPC: G01R31/28

CPC classification number: G01R31/2889 ,  G01R1/07378 ,  G01R31/31901 ,  G01R31/31905

Abstract: The present invention describes essentially three different embodiments for the implementation of low impedance (over frequency) power delivery to a die. Such low impedance to a high frequency allows the die to operate at package-level speed, thus reducing yield loss at the packaging level. Each embodiment addresses a slightly different aspect of the overall wafer probe application, lit each embodiment, however, the critical improvement of this disclosure is the location of the passive components used, for supply filtering/ decoupling relative to prior art. All three embodiments, require a method to embed the passive components in close proximity to the pitch translation substrate or physically in the pitch translation substrate.

公开(公告)号：EP2478751A4

公开(公告)日：2013-01-23

申请号：EP10817530

申请日：2010-01-08

Applicant: R & D CIRCUITS INC

Inventor： RUSSELL JAMES V

IPC: H05K1/18 ,  H01L23/32 ,  H05K3/30

CPC classification number: H05K3/30 ,  G01R1/07378 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/50 ,  H01L24/13 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/14 ,  H05K1/0213 ,  H05K1/0231 ,  H05K1/0234 ,  H05K1/0298 ,  H05K1/111 ,  H05K1/141 ,  H05K1/185 ,  H05K2201/049 ,  H05K2201/10378 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913 ,  H01L2924/00

Abstract: Embedding a power modification component such as a capacitance inside of an adaptor board located to extend over and beyond the vias of the main circuit board so that a portion of the interposer board containing the embedded capacitance is located beyond where the vias or blinds are located. This permits that via to conduct through the opening. In this way, the capacitance and the resistance will have a closer contact point to the electrical component. A resistance can also be embedded in an opening in the adaptor board and be vertically aligned within the opening to make contact with a pad on top of the adaptor board and a pad at the bottom of the adaptor board so that electricity conducts through the embedded component.

Abstract translation: 嵌入功率修改组件：如位于上方延伸的适配器板的内部和超出所述主电路板的通孔的电容所以做了插入器板包含嵌入电容的一部分被定位成超过该通路或百叶窗的位置。 这允许通过没有通过开口进行。 以这种方式，电容和电阻将具有更紧密的接触点到电组件。 的电阻因此可以在适配器板开口被嵌入在与所述开口内垂直对准，以与在适配器板的顶部上的垫和垫在适配器板的底部接触，从而没有电通过嵌入式部件进行 ，

公开(公告)号：EP3194989A4

公开(公告)日：2018-03-21

申请号：EP15835363

申请日：2015-08-26

Applicant: R&D CIRCUITS INC

Inventor： WARWICK THOMAS P ,  RUSSELL JAMES V

IPC: G01R31/28 ,  G01R31/303 ,  G01R31/317 ,  H01L23/498 ,  H04L1/24 ,  H04L12/24 ,  H04L12/26 ,  H05K1/02 ,  H05K1/11

CPC classification number: H04L1/243 ,  G01R31/2851 ,  G01R31/31716 ,  H04L41/24 ,  H04L43/50 ,  H05K1/0231 ,  H05K1/185 ,  H05K2201/10015

Abstract: A method and a structure with multiple implementations is provided that depends on the specific need, for placing (embedding) a serial loopback circuit of known design in a printed circuit board directly beneath the device under test. Micro-vias and traces connect components including transmitter components (TX) and receiver components (RX) that are formed into a loopback circuit for connection to a device under test (DUT). The connection is accomplished by a coupling capacitor with a shortest possible electrical length approximating a straight line between said components and said DUT and said distance is a length of said short straight line times a square root of 2 so that said receiver components are beneath the DUT.