公开(公告)号：TW200934018A

公开(公告)日：2009-08-01

申请号：TW097149346

申请日：2008-12-18

Applicant: R&D電路公司 R&D CIRCUITS

Inventor： 詹姆士V 羅素 RUSSELL, JAMES V.

IPC: H01R

CPC classification number: H01R13/2414 ,  H01R4/58 ,  H01R13/03 ,  H05K3/245 ,  H05K3/326 ,  H05K2201/0314 ,  H05K2201/10719

Abstract: 一種利用一等向傳導彈性物體以作為互連介質的電連接器。

Abstract in simplified Chinese: 一种利用一等向传导弹性物体以作为互连介质的电连接器。

公开(公告)号：TW201401675A

公开(公告)日：2014-01-01

申请号：TW102112597

申请日：2013-04-10

Applicant: R&D電路公司 ,  R&D CIRCUITS INC.

Inventor： 瓦維克 湯瑪斯P ,  WARWICK, THOMAS P. ,  羅素 詹姆士V ,  RUSSELL, JAMES V. ,  麥克穆林 戴米克 ,  MCMULLIN, DEMICK ,  奎克 威廉 ,  QUICK, WILLIAM

IPC: H01R13/24 ,  H01R13/42

CPC classification number: H01R13/03 ,  H01R12/52 ,  H01R13/2414 ,  H01R43/26 ,  Y10T29/49208 ,  Y10T29/4921

Abstract: 一種方法及電互連機構，其中，彈性體接腳被印刷到金屬保持器突片之上，該金屬保持器突片係具有至少一從其橫向延伸的突出部或突片以嚙合該積層的殼體的一接收槽或凹處，以便於設置該些彈性體接腳的每一個並且將其固定在該殼體之內。在一實施例中，一斜面可以和一接收槽或凹處一起被採用，以嚙合地固定一從該彈性體接腳的另一側邊橫向延伸之第二突出部或突片。在另一實施例中，該彈性體接腳可具有一環繞該接腳的中心之固體的金屬環或滑環，其中該環係具有一個或是兩個用於嚙合在該殼體中的該凹處之突片，並且若較佳的話，其亦嚙合一斜面的該凹處。

Abstract in simplified Chinese: 一种方法及电互连机构，其中，弹性体接脚被印刷到金属保持器突片之上，该金属保持器突片系具有至少一从其横向延伸的突出部或突片以啮合该积层的壳体的一接收槽或凹处，以便于设置该些弹性体接脚的每一个并且将其固定在该壳体之内。在一实施例中，一斜面可以和一接收槽或凹处一起被采用，以啮合地固定一从该弹性体接脚的另一侧边横向延伸之第二突出部或突片。在另一实施例中，该弹性体接脚可具有一环绕该接脚的中心之固体的金属环或滑环，其中该环系具有一个或是两个用于啮合在该壳体中的该凹处之突片，并且若较佳的话，其亦啮合一斜面的该凹处。

公开(公告)号：EP3345248A1

公开(公告)日：2018-07-11

申请号：EP16842470.3

申请日：2016-06-22

Applicant: R&D Circuits Inc.

Inventor： WARWICK, Thomas, P. ,  TURPUSEEMA, Dhananjaya ,  RUSSELL, James, V.

IPC: H01R12/00 ,  B33Y80/00 ,  H01R13/02 ,  H05K1/14 ,  H05K3/36 ,  H01L23/522 ,  H01L23/535

CPC classification number: H01R12/52 ,  H01L23/522 ,  H01L23/5225 ,  H01L23/535 ,  H05K1/185 ,  H05K3/4046 ,  H05K2201/09118 ,  H05K2201/10287

Abstract: The present invention provides for a method and structure for forming three-dimensionally routed dielectric wires between discrete points on the two or more parallel circuit planes. The wires may be freely routed in three-dimensional space as to create the most efficient routing between the two arbitrarily defined points on the two or more parallel circuit planes. Metalizing the outer surfaces of these three dimensional dielectric wires electrically coupling the discrete wires to their respective discrete contact points. Two or more of these wires may be in intimate contact to one another electrically coupling to each other as well as to two or more discrete contact pads. These electrically coupled contact pads may be on opposite sides or on the same side of the structure and the formed metalized wires may originate on one side and terminate on the other or originate and terminate from the same side

公开(公告)号：EP2798702A4

公开(公告)日：2015-08-26

申请号：EP13777883

申请日：2013-03-28

Applicant: R & D CIRCUITS INC

Inventor： WARWICK THOMAS P ,  RUSSELL JAMES V ,  MCMULLIN DERMICK ,  QUICK WILLIAM

IPC: H01R13/24 ,  H01R12/52

CPC classification number: H01R13/03 ,  H01R12/52 ,  H01R13/2414 ,  H01R43/26 ,  Y10T29/49208 ,  Y10T29/4921

公开(公告)号：EP2428105A4

公开(公告)日：2013-05-29

申请号：EP10772351

申请日：2010-01-08

Applicant: R & D CIRCUITS INC

Inventor： RUSSELL JAMES V

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K1/185 ,  H05K1/023 ,  H05K1/0231 ,  H05K1/0234 ,  H05K1/112 ,  H05K3/4046 ,  H05K2201/096 ,  H05K2201/10636 ,  Y02P70/611

公开(公告)号：EP2893783A4

公开(公告)日：2016-08-24

申请号：EP13834789

申请日：2013-08-09

Applicant: R&D CIRCUITS INC

Inventor： TURPUSEEMA DAN ,  RUSSELL JAMES V

IPC: H05K3/06 ,  H01L21/02 ,  H05K1/02

CPC classification number: H05K3/425 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0094 ,  H05K3/243 ,  H05K3/4007 ,  H05K3/427 ,  H05K2201/0959 ,  Y10T29/49156

公开(公告)号：EP2225802A2

公开(公告)日：2010-09-08

申请号：EP08863567.7

申请日：2008-12-17

Applicant: R&D Circuits Inc.

Inventor： RUSSELL, James, V.

IPC: H01R12/16 ,  H01R4/58

CPC classification number: H01R13/2414 ,  H01R4/58 ,  H01R13/03 ,  H05K3/245 ,  H05K3/326 ,  H05K2201/0314 ,  H05K2201/10719

Abstract: An electrical connector using an isotropic conductive elastomer as the interconnect medium.

公开(公告)号：EP2798702A1

公开(公告)日：2014-11-05

申请号：EP13777883.3

申请日：2013-03-28

Applicant: R&D Circuits Inc.

Inventor： WARWICK, Thomas, P. ,  RUSSELL, James, V. ,  MCMULLIN, Dermick ,  QUICK, William

IPC: H01R12/00

CPC classification number: H01R13/03 ,  H01R12/52 ,  H01R13/2414 ,  H01R43/26 ,  Y10T29/49208 ,  Y10T29/4921

Abstract: A method and an electrical interconnect mechanism in which elastomeric pins are printed onto metal retainer tabs having at least one protrusion or tab extending laterally therefrom to engage a catch or recess of the laminated housing so as to locate each of the elastomeric pins and secure them within the housing. In one embodiment a champher may be employed with a catch or recess to engagely secure a second protrusion or tab extending laterally from another side of said elastomeric pin. In another embodiment the elastomeric pin may have a solid metal ring or a slide collar around the center of the pin wherein the ring has one or two tabs for engaging the recess in the housing and if preferred also the recess of a champfer.

公开(公告)号：EP2428105A1

公开(公告)日：2012-03-14

申请号：EP10772351.2

申请日：2010-01-08

Applicant: R&D Circuits Inc.

Inventor： RUSSELL, James, V.

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K1/185 ,  H05K1/023 ,  H05K1/0231 ,  H05K1/0234 ,  H05K1/112 ,  H05K3/4046 ,  H05K2201/096 ,  H05K2201/10636 ,  Y02P70/611

Abstract: The present disclosure relates to embedding a power modification component such as a capacitance or a resistance inside of pads that are located to extend over and beyond the vias of the PCB so that a portion of the pad containing the embedded capacitance or resistance is located beyond where the vias or blinds are located. Each of the pads will include an opening that is located over a given one of the vias or blinds to permit that via to conduct through the opening. In this way the capacitance and the resistance will have a closer contact point the electrical component.

公开(公告)号：EP3304110A1

公开(公告)日：2018-04-11

申请号：EP16803876.8

申请日：2016-02-26

Applicant: R&D Circuits Inc.

Inventor： WARWICK, Thomas, P. ,  RUSSELL, James, V. ,  TURPUSEEMA, Dhananjaya

IPC: G01R31/28

CPC classification number: G01R31/2889 ,  G01R1/07378 ,  G01R31/31901 ,  G01R31/31905

Abstract: The present invention describes essentially three different embodiments for the implementation of low impedance (over frequency) power delivery to a die. Such low impedance to a high frequency allows the die to operate at package-level speed, thus reducing yield loss at the packaging level. Each embodiment addresses a slightly different aspect of the overall wafer probe application, lit each embodiment, however, the critical improvement of this disclosure is the location of the passive components used, for supply filtering/ decoupling relative to prior art. All three embodiments, require a method to embed the passive components in close proximity to the pitch translation substrate or physically in the pitch translation substrate.