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公开(公告)号：KR100634256B1
公开(公告)日：2006-10-13
申请号：KR1020050043696
申请日：2005-05-24
Applicant: 삼성전자주식회사
IPC: H01L21/336
Abstract: A method for fabricating a tantalum carbon nitride layer and a method for manufacturing a semiconductor device using the same are provided to form a gate having an equivalent oxide thickness by using a high-k dielectric as a gate dielectric. An isolation layer(110) having an active region is arranged on a predetermined region of a semiconductor substrate(100). A channel doping region is formed under the substrate surface corresponding to the active region. A high-k dielectric(120) is disposed on the semiconductor substrate and has a higher dielectric constant than a conventional silicon oxide. A gate electrode structure(190) is arranged on the high-k dielectric. A gate spacer(160) is arranged on a sidewall of the gate electrode structure. The gate electrode structure is a layered structure of a tantalum carbon nitride layer pattern(135) and a conductive pattern(145).
Abstract translation: 提供一种用于制造钽碳氮化物层的方法和使用该方法制造半导体器件的方法，以通过使用高k电介质作为栅极电介质来形成具有等效氧化物厚度的栅极。 具有有源区的隔离层（110）被布置在半导体衬底（100）的预定区域上。 沟道掺杂区形成在对应于有源区的衬底表面下方。 高k电介质（120）设置在半导体衬底上并且具有比常规氧化硅更高的介电常数。 栅电极结构（190）布置在高k电介质上。 栅极间隔物（160）布置在栅极电极结构的侧壁上。 栅电极结构是钽氮化碳层图案（135）和导电图案（145）的分层结构。
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公开(公告)号：KR101909205B1
公开(公告)日：2018-10-17
申请号：KR1020120041598
申请日：2012-04-20
Applicant: 삼성전자주식회사
IPC: H01L29/78 , H01L21/336
CPC classification number: H01L29/785 , H01L27/0886
Abstract: 반도체소자는핀형 (fin-type) 활성영역과, 게이트절연막과, 게이트절연막위에서활성영역의상면및 양측면을덮으면서활성영역과교차하여연장되는게이트라인을포함한다. 게이트라인은활성영역의상면및 양측면을균일한두께로덮도록연장되는 Al 도핑된금속함유막과, 활성영역위에서 Al 도핑된금속함유막위에연장되는갭필금속막을포함한다.
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公开(公告)号：KR101527535B1
公开(公告)日：2015-06-10
申请号：KR1020080103197
申请日：2008-10-21
Applicant: 삼성전자주식회사
IPC: H01L21/324 , H01L21/3105
CPC classification number: H01L21/823842 , H01L21/82345 , H01L21/823462 , H01L21/823857
Abstract: 반도체소자및 그형성방법을제공한다. 이방법은기판상에단일층또는다층의금속산화막을형성하고, 금속산화막상에희생산화막을형성한다. 기판에열처리공정을수행한다. 열처리공정의공정온도에서, 희생산화막의형성자유에너지는금속산화막의형성자유에너지보다크다.
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公开(公告)号：KR1020140088784A
公开(公告)日：2014-07-11
申请号：KR1020130000722
申请日：2013-01-03
Applicant: 삼성전자주식회사
IPC: H01L21/336 , H01L29/78
CPC classification number: H01L21/823431 , H01L27/0886
Abstract: A method of manufacturing a FIN FET forms a first active pin having a first line width in a first area on a semiconductor substrate, and a second active pin having a second line width narrower than the first line width in a second region of the semiconductor substrate. A gate oxide layer is formed on surfaces of the first and second active pins through a deposition process. A gate electrode is formed on the gate oxide layer. The FIN FET formed through the above process is highly integrated and represents an excellent electrical characteristic.
Abstract translation: 制造FIN FET的方法形成在半导体衬底上的第一区域中具有第一线宽度的第一有源销和在半导体衬底的第二区域中具有比第一线宽窄的第二线宽的第二有源销 。 栅极氧化层通过沉积工艺形成在第一和第二有源引脚的表面上。 栅电极形成在栅极氧化层上。 通过上述工艺形成的FIN FET高度集成，表现出优异的电气特性。
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公开(公告)号：KR1020110107207A
公开(公告)日：2011-09-30
申请号：KR1020100026431
申请日：2010-03-24
Applicant: 삼성전자주식회사
IPC: H01L21/8238 , H01L21/336 , H01L29/78
CPC classification number: H01L21/823842 , H01L29/66545 , H01L21/8238 , H01L21/02225 , H01L21/0465 , H01L21/4763
Abstract: 반도체 소자 및 그 제조 방법이 제공된다. 이 방법에 따르면, 서로 이격된 제1 영역 및 제2 영역을 포함하는 기판이 준비되고, 상기 제1 영역 및 제2 영역 내에 각각 배치된 제1 및 제2 개구부들을 갖는 층간 절연막이 상기 기판 상에 형성되고, 상기 제1 및 제2 개구부들을 채우는 제1 도전막이 형성되고, 상기 제1 도전막을 식각하여, 상기 제1 개구부의 바닥면이 노출되고, 상기 제2 개구부 내에 상기 제1 도전막의 일부가 잔존되고, 상기 제2 개구부의 비어있는 윗 영역 및 상기 제1 개구부를 채우는 제2 도전막이 형성된다.
Abstract translation: 提供了一种半导体器件及其制造方法。 根据该方法，包括间隔开的衬底开的第一和制备第二区域，层间在基板上具有第一和第二区域中的第一和第二开口中的相应布置绝缘膜， 形成，并且，其中，所述形成的第一和所述膜是第一导电填充第二开口，和所述第一导电蚀刻停止，所述第一和第一开口而暴露的底表面上，所述第一导电膜的部分在开口的第二 并且形成第二导电膜以填充第二开口和第一开口的空的上部区域。
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Patent Agency Ranking
公开(公告)号：KR2020090008059U
公开(公告)日：2009-08-07
申请号：KR2020080001657
申请日：2008-02-04
Applicant: 삼성전자주식회사
CPC classification number: F25D17/042 , F24F6/12 , F24F2003/1446 , F25D25/025 , F25D2317/0413 , F25D2325/021
Abstract: 외부로부터 물을 공급받지 않아도 저장박스 내부의 습도를 유지할 수 있는 수분공급장치를 구비한 냉장고를 개시한다. 본 고안의 수분공급장치는 저장실 내부의 수분을 응축하여 수집하는 응축부와, 저장실과 저장박스 각각에서 돌출하여 분할판을 관통하며, 응축부와 접촉되어 응축부에서 흡수된 수분을 전달받는 다공성전극과, 다공성전극과 이격되도록 설치되어 다공성전극과의 사이에서 정전분무를 발생시키는 접지전극과, 다공성전극과 접지전극에 전원을 각각 인가하는 전압원을 포함한다. 이에 따라 개시된 냉장고에서는 응축부와, 응축부에서 흡수된 수분을 저장박스로 정전분무 시키는 다공성전극, 접지전극, 전압원의 작용에 의해 외부의 물을 공급받지 않아도 저장박스 내부의 습도를 유지할 수 있게 된다.
Abstract translation: 本发明公开了一种具有供水装置的冰箱，该供水装置能够在不从外部供应水的情况下维持储水箱内的湿度。 本主题创新的供水是一种多孔电极，用于接收触头冷凝单元，和一个储存室和储存箱，并通过在收集储藏室内凝结的水分的相应的冷凝单元中的分区板突出通行证在冷凝单元吸收的湿气 以及分别用于向多孔电极和接地电极供电的电压源。 因此，在所公开的冰箱冷凝单元，它不被多孔电极，接地电极，用于静电电压源的动作喷洒在冷凝单元吸收作为存储盒中的水分能够保持储藏盒内部的湿度接收的外部供水 。
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公开(公告)号：KR1020080103277A
公开(公告)日：2008-11-27
申请号：KR1020070050371
申请日：2007-05-23
Applicant: 삼성전자주식회사
IPC: H01L29/78
CPC classification number: H01L21/823842 , H01L21/82385
Abstract: A semiconductor device and a manufacturing method thereof are provided to improve the gate depletion phenomenon by setting up the first and the second conductive layer pattern at the bottom part of the gate located on the first and second area. A semiconductor device comprises the semiconductor substrate(100) including the first area and the second area; the gate insulating layer formed on the first and second area of the semiconductor substrate; the first gate(140) including the first poly silicon film pattern(120) formed on the first conductive layer pattern and the first conductive layer pattern; the second conductive layer pattern(110b) thicker than the first conductive layer pattern(110a); the second gate(150) including the second polysilicon layer pattern formed on the second conductive layer pattern and the second conductive layer pattern. The second conductive layer pattern is formed on the gate insulating layer of the second part.
Abstract translation: 提供半导体器件及其制造方法，以通过在位于第一和第二区域的栅极的底部设置第一和第二导电层图案来改善栅极耗尽现象。 半导体器件包括包括第一区域和第二区域的半导体衬底（100） 所述栅极绝缘层形成在所述半导体衬底的所述第一和第二区域上; 所述第一栅极（140）包括形成在所述第一导电层图案上的所述第一多晶硅图案（120）和所述第一导电层图案; 所述第二导电层图案（110b）比所述第一导电层图案（110a）厚; 第二栅极（150）包括形成在第二导电层图案上的第二多晶硅层图案和第二导电层图案。 第二导电层图案形成在第二部分的栅极绝缘层上。
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公开(公告)号：KR100852212B1
公开(公告)日：2008-08-13
申请号：KR1020070057450
申请日：2007-06-12
Applicant: 삼성전자주식회사
IPC: H01L21/336 , H01L29/78
CPC classification number: H01L29/4958 , H01L21/823828 , H01L27/092 , H01L29/4966
Abstract: A semiconductor device and a method for forming the same are provided to reduce an optimum time delay value by reducing an ion implantation process and simplifying a manufacturing process. A first gate structure including a first insulating layer pattern(112), a first conductive layer pattern(114), and a first polysilicon layer pattern(116) doped with a first impurity of a first conductive type is formed on a first region of a substrate(100). A first source/drain(132) doped with a second impurity is formed on the first region of the substrate. A second gate structure including a second insulating layer pattern(122), a second conductive layer pattern, and a second polysilicon layer pattern(126) doped with a third impurity of the same conductive type is formed on a second region of the substrate. A second source/drain(134) doped with a fourth impurity of an opposite conductive type to the second impurity is formed on a second region of the substrate.
Abstract translation: 提供一种半导体器件及其形成方法，通过减少离子注入工艺并简化制造工艺来减少最佳时间延迟值。 包括第一绝缘层图案（112），第一导电层图案（114）和掺杂有第一导电类型的第一杂质的第一多晶硅层图案（116）的第一栅极结构形成在 基板（100）。 掺杂有第二杂质的第一源极/漏极（132）形成在衬底的第一区域上。 在衬底的第二区域上形成包括掺杂有相同导电类型的第三杂质的第二绝缘层图案（122），第二导电层图案和第二多晶硅层图案（126）的第二栅极结构。 在衬底的第二区域上形成掺杂有与第二杂质相反的导电类型的第四杂质的第二源极/漏极（134）。
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公开(公告)号：KR1020070075675A
公开(公告)日：2007-07-24
申请号：KR1020060004205
申请日：2006-01-14
Applicant: 삼성전자주식회사
CPC classification number: F25D17/065 , F25D17/045 , F25D31/007 , F25D2317/061 , F25D2317/0665 , F25D2400/28 , F25D2700/121
Abstract: An overcooling device is provided to maintain constant temperature characteristics by controlling variation width of temperature very narrowly so as to stably maintain an overcooled state, and to provide overcooled beverages in short time to users. An overcooling device comprises storage space(220), an overcooling room(200), a cool air flow inlet/outlet and a damper(250). The storage space is supplied with cool air from a cool air supply unit. The overcooling room is formed in the storage space, cooled by the supplied cool air and indirectly cools a cooled body in the storage space. The cool air flow inlet/outlet is formed in one side of the overcooling room so that the cool air comes in and goes out to the inside of the overcooling room. The damper opens or closes the cool air flow inlet/outlet. Direct or indirect cooling of the cooled body in the overcooling room is selectively carried out by opening or closing of the damper.
Abstract translation: 提供过冷装置以通过非常狭窄地控制温度变化宽度来保持恒温特性，以便稳定地保持过冷状态，并在短时间内为使用者提供过冷饮料。 过冷装置包括储存空间（220），过冷室（200），冷空气流入口/出口和阻尼器（250）。 储存空间由冷气供应单元提供冷气。 过冷室形成在储存空间中，由供应的冷空气冷却，间接地冷却存储空间中的冷却体。 冷空气流入口/出口形成在过冷室的一侧，使得冷空气进入并流出到过冷室的内部。 阻尼器打开或关闭冷气流入口/出口。 通过打开或关闭阻尼器来选择性地执行过冷室中的冷却体的直接或间接冷却。
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公开(公告)号：KR1020070075673A
公开(公告)日：2007-07-24
申请号：KR1020060004203
申请日：2006-01-14
Applicant: 삼성전자주식회사
CPC classification number: F25D31/007 , A23G9/045 , A23G9/228 , F25D29/00 , F25D2700/08
Abstract: A control method of an overcooling apparatus is provided to prevent liquid beverages from being frozen in an overcooling process by storing the respective liquid beverages at proper overcooling temperature, and to prevent slush strength from being changed depending on kinds of the liquid beverages. A control method of an overcooling apparatus having a storage room comprises the steps of checking liquid beverages put in the storage room(30), obtaining proper overcooling temperature of the liquid beverages(40), and making temperature of the storage room to become the obtained proper overcooling temperature(50).
Abstract translation: 提供了一种过冷却装置的控制方法，以通过将各种液体饮料储存在适当的过冷却温度下，防止液体饮料在过冷却过程中冻结，并且防止根据液体饮料的种类而改变浆液强度。 具有储藏室的过冷却装置的控制方法包括：检查放置在储藏室（30）中的液体饮料，获得液体饮料（40）的适当的过冷却温度，使储藏室的温度变为所得的步骤 适当的过冷却温度（50）。
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