公开(公告)号：AT347750T

公开(公告)日：2006-12-15

申请号：AT99120073

申请日：1999-10-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LUDWIG CHRISTOPH DR ,  KUTTER CHRISTOPH DR ,  WOLF KONRAD DR ,  HEITZSCH OLAF ,  HUCKELS KAI ,  RENNEKAMP REINHOLD ,  ROEHRICH MAYK ,  STEIN VON KAMIENSKI ELARD DR ,  WAWER PETER DR ,  SPRINGMANN OLIVER

IPC: H01L21/8247 ,  G11C16/04 ,  H01L21/82 ,  H01L27/115 ,  H01L29/06 ,  H01L29/788 ,  H01L29/792 ,  H03K19/173

公开(公告)号：DE102005024955A1

公开(公告)日：2006-12-07

申请号：DE102005024955

申请日：2005-05-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MUEHLBACHER BENNO ,  GRATZ ACHIM ,  ROEHRICH MAYK ,  KRICKL EVELYN MARIA ,  WIESBAUER ANDREAS ,  SANSEGUNDOBELLO DAVID ,  POETSCHER THOMAS

IPC: H03K19/0185 ,  H03K19/003

Abstract: The circuit has a signal input (2) to apply logic signals having a signal-reference potential and a preset signal hub. A cascade protective circuit (14) is provided between low voltage transistor pairs (11, 13) to limit voltage drops in low voltage field effect transistors (11a, 11b, 13a, 13b) of both the pairs. A signal output is tapped in a gate connector of the transistors (13a, 13b) of the complementary pair (13) to output level shifted logic signals with a signal hub.

公开(公告)号：DE19929618B4

公开(公告)日：2006-07-13

申请号：DE19929618

申请日：1999-06-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WAWER PETER ,  HEITZSCH OLAF ,  ROEHRICH MAYK ,  SPRINGMANN OLIVER ,  HUCKELS KAI ,  STEIN VON KAMIENSKI ELARD ,  WOLF KONRAD ,  RENNEKAMP REINHOLD ,  KUTTER CHRISTOPH ,  LUDWIG CHRISTOPH

IPC: H01L21/8247 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: A method for producing a non-volatile semiconductor memory cell with a separate tunnel window cell includes the step of forming a tunnel zone in a late implantation step by performing a tunnel implantation with the aid of a tunnel window cell as a mask. The resulting memory cell has a small area requirement and a high number of program/clear cycles.

公开(公告)号：DE10336785B4

公开(公告)日：2005-01-27

申请号：DE10336785

申请日：2003-08-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GRATZ ACHIM ,  ROEHRICH MAYK ,  KNOBLOCH KLAUS

IPC: G11C16/04

公开(公告)号：DE10115393A1

公开(公告)日：2002-10-10

申请号：DE10115393

申请日：2001-03-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GRATZ ACHIM ,  ROEHRICH MAYK

IPC: H01L21/265 ,  H01L21/8238

Abstract: The production of an integrated circuit comprises implanting a low energetic implantation (I1) and a high energetic implantation (I2) in the surface region having a first region (A) and a second region (B). The thickness of the covering layers (1, 2) of the surface regions are selected and the implanted so that the low energetic implantation is absorbed by the second covering layer in the second surface region and the high energetic implantation is only halted by the second covering layer. The second covering layer is implanted exactly into the defined implantation depth below the second covering layer. Preferred Features: The difference in thickness between the second and first covering layers is 20-45 nm. The implantation energy of the low energetic implantation is adjusted so that it is absorbed in the second surface region by the second covering layer.