公开(公告)号：DE59706533D1

公开(公告)日：2002-04-11

申请号：DE59706533

申请日：1997-05-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RISCH LOTHAR ,  ROESNER WOLFGANG

IPC: G11C11/38 ,  G11C11/34 ,  G11C11/40 ,  G11C11/404 ,  H01L27/10 ,  H01L27/28 ,  H01L51/05

Abstract: Each memory cell of an array has a single-electron transistor and a single-electron memory element. The single-electron transistor is driven by a charge stored in the memory element. When a read voltage is applied, a current flows through the single-electron transistor which is dependent on the stored charge, but the stored charge in not changed. When a write voltage is applied, the magnitude of which is greater than the read voltage, then the stored charge is changed. The memory cells of the array are each connected between first lines and transverse second lines of a memory cell configuration.

公开(公告)号：DE59706513D1

公开(公告)日：2002-04-04

申请号：DE59706513

申请日：1997-07-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROESNER WOLFGANG ,  RISCH LOTHAR ,  HOFMANN FRANZ ,  STENGL REINHARD

IPC: H01L21/8242 ,  H01L27/108

公开(公告)号：AT214194T

公开(公告)日：2002-03-15

申请号：AT97107314

申请日：1997-05-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RISCH LOTHAR ,  ROESNER WOLFGANG

IPC: G11C11/38 ,  G11C11/34 ,  G11C11/40 ,  G11C11/404 ,  H01L27/10 ,  H01L27/28 ,  H01L51/05

Abstract: Each memory cell of an array has a single-electron transistor and a single-electron memory element. The single-electron transistor is driven by a charge stored in the memory element. When a read voltage is applied, a current flows through the single-electron transistor which is dependent on the stored charge, but the stored charge in not changed. When a write voltage is applied, the magnitude of which is greater than the read voltage, then the stored charge is changed. The memory cells of the array are each connected between first lines and transverse second lines of a memory cell configuration.

公开(公告)号：DE19950362C1

公开(公告)日：2001-06-07

申请号：DE19950362

申请日：1999-10-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROESNER WOLFGANG ,  SCHULZ THOMAS ,  RISCH LOTHAR ,  HOFMANN FRANZ

IPC: H01L21/8242 ,  H01L27/108 ,  H01L27/12 ,  G11C11/401

Abstract: The DRAM arrangement has several memory cells, each with storage (S) and transfer (T) transistors. A transfer transistor gate electrode is connected to a word line (W). The storage transistor has a floating gate electrode separated from a channel region by a first dielectric and connected to a source/drain region of the transfer transistor. The storage transistor has a control gate electrode separated from the floating gate electrode by a second dielectric and connected to the word line. A first source/drain region of the storage transistor is connected to a bit line (B) running transversely wrt. the word line.

公开(公告)号：DE19935823A1

公开(公告)日：2001-03-01

申请号：DE19935823

申请日：1999-07-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROESNER WOLFGANG ,  RISCH LOTHAR

IPC: H01L27/32 ,  H01L51/52 ,  H01L51/20 ,  C08L101/12 ,  H01L27/15 ,  H01L51/40

Abstract: Electro-optical microelectronic arrangement containing electronic components and light-emitting components connected together comprises a metallizing plane on an integrated semiconductor circuit system (20). Electrodes (22, 23) for light-emitting components based on semiconducting organic materials are formed in this plane. A layer of semiconducting organic material (21) is provided on the metallizing plane. An Independent claim is also included for a process for the production of the electro-optical microelectronic arrangement comprising applying a metallizing plane on an integrated semiconductor circuit system to form contacts in the plane, applying a semiconducting organic material on the plane and structuring. Preferred Features: The integrated semiconductor circuit system is a system based on polysilicon or amorphous silicon on a glass support. The semiconducting organic material is a conjugated polymer or oligomer.

公开(公告)号：DE19942692B4

公开(公告)日：2007-04-12

申请号：DE19942692

申请日：1999-09-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHULZ THOMAS ,  ROESNER WOLFGANG ,  RISCH LOTHAR

IPC: H01L27/14 ,  H01L31/0232 ,  G02B6/42 ,  H01L27/144 ,  H01L27/15 ,  H01L31/10 ,  H01L31/102

Abstract: In an integrated optoelectronic microelectronic system, an optoelectronically active diode part is formed in a semiconductor substrate by zones forming depletion layers. The system is provided in a mesa that stands vertically on a semiconductor substrate and runs in a direction of extension thereof. A light waveguide is optically coupled to the diode part in such a way that light is coupled into the diode part via the mesa side wall.

公开(公告)号：DE10220923B4

公开(公告)日：2006-10-26

申请号：DE10220923

申请日：2002-05-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SPECHT MICHAEL ,  HOFMANN FRANZ ,  LANDGRAF ERHARD ,  ROESNER WOLFGANG ,  STAEDELE MARTIN

IPC: H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8246 ,  H01L21/84 ,  H01L27/115 ,  H01L27/12 ,  H01L29/786 ,  H01L29/788

公开(公告)号：DE102004033149A1

公开(公告)日：2006-02-09

申请号：DE102004033149

申请日：2004-07-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LUYKEN RICHARD JOHANNES ,  ROESNER WOLFGANG ,  ILICALI GUERKAN

IPC: H01L21/306 ,  H01L21/336

公开(公告)号：DE10306295A1

公开(公告)日：2004-09-02

申请号：DE10306295

申请日：2003-02-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOFMANN FRANZ ,  LUYKEN R JOHANNES ,  ROESNER WOLFGANG

IPC: H01L27/146

Abstract: The production of a photosensor arrangement comprises inserting a first photodiode (103) into an auxiliary substrate, forming electrical connections on the first side of the substrate to contact the photodiode, and applying a support substrate to the first main side of the auxiliary substrate. The photodiode is structured in such a way that it can be irradiated from the second main side of the auxiliary substrate which lies opposite the first main side. An independent claim is also included for a photosensor arrangement produced by the above process.

公开(公告)号：DE10250830A1

公开(公告)日：2004-05-19

申请号：DE10250830

申请日：2002-10-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROESNER WOLFGANG ,  LUYKEN R JOHANNES ,  SPECHT MICHAEL ,  KRETZ JOHANNES

IPC: G11C13/02 ,  H01L29/78 ,  H01L51/00 ,  H01L51/30

Abstract: Integrated circuit array having field effect transistors (FETs) formed next to and/or above one another. The array has a substrate, a planarized first wiring plane with interconnects and first source/drain regions of the FETs, a planarized first insulator layer on the first wiring plane, a planarized gate region layer, which has patterned gate regions made of electrically conductive material and insulator material introduced therebetween, on the first insulated layer, a planarized second insulator layer on the gate region layer, holes formed through the second insulator layer, the gate regions, and the first insulator layer, a vertical nanoelement serving as a channel region in each of the holes, a second wiring plane with interconnects and second source/drain regions of the FETs, each nanoelement being arranged between the first and second wiring planes, and a gate insulating layer between the respective vertical nanoelement and the electrically conductive material of the gate regions.