公开(公告)号：WO03088310A2

公开(公告)日：2003-10-23

申请号：PCT/DE0301281

申请日：2003-04-16

Applicant: INFINEON TECHNOLOGIES AG ,  HOFMANN FRANZ ,  LUYKEN RICHARD JOHANNES ,  ROESNER WOLFGANG ,  SPECHT MICHAEL ,  STAEDELE MARTIN

Inventor： HOFMANN FRANZ ,  LUYKEN RICHARD JOHANNES ,  ROESNER WOLFGANG ,  SPECHT MICHAEL ,  STAEDELE MARTIN

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/20 ,  H01L21/265 ,  H01L21/336 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/08 ,  H01L27/088 ,  H01L27/12 ,  H01L29/786 ,  H01L

CPC classification number: H01L21/76262 ,  H01L21/76251

Abstract: The invention relates to a substrate (600) which is provided with a support layer (501). An insulator layer (502) is applied to the support layer (501), comprising at least two areas having respectively different thicknesses. A semi-conductor layer (303) having an FD-area (304) and a PD-area (305) is applied to the surface of the insulating layer (502), comprising a planar surface. The planar surface is the surface which is opposite the insulating layer (502).

Abstract translation: 本发明提供一种基板（600），其包括载体层（501）。 其中的绝缘层（502）被施加，包括各自具有不同厚度的至少两个区域的载体层（501）上。 在绝缘体层的表面（502）是与FD区域（304）和PD区域（305）的半导体层（303）被施加，其具有平坦表面，所述平坦表面与所述表面的绝缘体层（502） 对面。

公开(公告)号：DE10216838A1

公开(公告)日：2003-11-06

申请号：DE10216838

申请日：2002-04-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SPECHT MICHAEL ,  HOFMANN FRANZ ,  STAEDELE MARTIN ,  ROESNER WOLFGANG ,  LUYKEN R JOHANNES

IPC: H01L21/762 ,  H01L29/78 ,  H01L21/336

Abstract: The substrate (600) has a carrier layer (501), a silicon oxide insulating layer (502) applied to the carrier layer with at least two regions of different thicknesses so that a stepped insulating layer surface is formed and an at least partly epitaxially formed silicon semiconducting layer (303) formed on the stepped surface with a planar surface opposite the stepped surface. AN Independent claim is also included for the following: a method of manufacturing and inventive device.

公开(公告)号：DE10158019C2

公开(公告)日：2003-09-18

申请号：DE10158019

申请日：2001-11-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SPECHT MICHAEL ,  STAEDELE MARTIN ,  ROESNER WOLFGANG ,  HOFMANN FRANZ

IPC: H01L21/8247 ,  H01L21/28 ,  H01L27/115 ,  H01L29/423 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792

公开(公告)号：DE10220923B4

公开(公告)日：2006-10-26

申请号：DE10220923

申请日：2002-05-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SPECHT MICHAEL ,  HOFMANN FRANZ ,  LANDGRAF ERHARD ,  ROESNER WOLFGANG ,  STAEDELE MARTIN

IPC: H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8246 ,  H01L21/84 ,  H01L27/115 ,  H01L27/12 ,  H01L29/786 ,  H01L29/788

公开(公告)号：DE50312772D1

公开(公告)日：2010-07-15

申请号：DE50312772

申请日：2003-04-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HOFMANN FRANZ ,  LUYKEN RICHARD JOHANNES ,  ROESNER WOLFGANG ,  SPECHT MICHAEL ,  STAEDELE MARTIN

IPC: H01L21/762 ,  H01L29/06 ,  H01L21/02 ,  H01L21/20 ,  H01L21/265 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/84 ,  H01L27/08 ,  H01L27/088 ,  H01L27/12 ,  H01L29/786

公开(公告)号：DE102005024951A1

公开(公告)日：2006-12-14

申请号：DE102005024951

申请日：2005-05-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROESNER WOLFGANG ,  HOFMANN FRANZ ,  SPECHT MICHAEL ,  STAEDELE MARTIN ,  LUYKEN JOHANNES

IPC: H01L27/108 ,  G11C11/40

Abstract: A semiconductor memory component comprises at least one memory cell. The memory cell comprises a semiconductor body comprised of a body region, a drain region and a source region, a gate dielectric, and a gate electrode. The body region comprises a first conductivity type and a depression between the source and drain regions, and the source and drain regions comprise a second conductivity type. The gate electrode is arranged at least partly in the depression and is insulated from the body, source, and drain regions by the gate dielectric. The body region further comprises a first continuous region with a first dopant concentration and a second continuous region with a second dopant concentration greater than the first dopant concentration. The first continuous region adjoins the drain region, the depression and the source region, and the second region is arranged below the first region and adjoins the first region.

公开(公告)号：DE10220923A1

公开(公告)日：2003-11-27

申请号：DE10220923

申请日：2002-05-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SPECHT MICHAEL ,  HOFMANN FRANZ ,  LANDGRAF ERHARD ,  ROESNER WOLFGANG ,  STAEDELE MARTIN

IPC: H01L21/28 ,  H01L21/336 ,  H01L21/8246 ,  H01L21/8247 ,  H01L21/84 ,  H01L27/115 ,  H01L27/12 ,  H01L29/786 ,  H01L29/788

公开(公告)号：DE10158019A1

公开(公告)日：2003-06-12

申请号：DE10158019

申请日：2001-11-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SPECHT MICHAEL ,  STAEDELE MARTIN ,  ROESNER WOLFGANG ,  HOFMANN FRANZ

IPC: H01L21/8247 ,  H01L21/28 ,  H01L27/115 ,  H01L29/423 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792

公开(公告)号：DE10158018A1

公开(公告)日：2003-06-12

申请号：DE10158018

申请日：2001-11-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SPECHT MICHAEL ,  STAEDELE MARTIN ,  ROESNER WOLFGANG

IPC: H01L29/15 ,  H01L29/423 ,  H01L29/788 ,  H01L27/115

Abstract: The invention relates to a layer assembly and to a method for operating a layer assembly as a data memory. The layer assembly comprises a layer structure, which is located between a first and a second electrode region and provided with an electrically non-conductive layer located on the first electrode region, with a number of potential well layers each having at least one energy level and being covered on both sides by a tunnel layer, and with a charge storage layer that is located between the electrically non-conductive tunnel layer and the potential well layers. The potential well layers are disposed so that, in the absence of an electrical voltage between the first electrode region and the second electrode region, their energy levels are offset with regard to one another whereby rendering the potential well layers electrically non-conductive and, in the event of an applied predetermined electrical voltage between the first electrode region and the second electrode region, the energy levels of the potential well layers are offset with regard to one another whereby rendering the potential well layers electrically conductive.