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    Integrated semiconductor chemical microreactor for real-time monitoring of biological reactions
    35.
    发明公开
    Integrated semiconductor chemical microreactor for real-time monitoring of biological reactions 审中-公开
    对于生物反应的实时监测的半导体材料的集成化学反应器

    公开(公告)号：EP1541991A1

    公开(公告)日：2005-06-15

    申请号：EP03425800.4

    申请日：2003-12-12

    Applicant: STMicroelectronics S.r.l.

    Inventor： Mastromatteo, Ubaldo ,  Villa, Flavio Francesco ,  Barlocchi, Gabriele

    IPC: G01N21/25 ,  G01N21/64 ,  B01L3/00 ,  B81B3/00 ,  B01J19/00

    CPC classification number: G01N21/6428 ,  B01J19/0093 ,  B01J2219/0097 ,  B01L3/502707 ,  B01L3/502715 ,  B01L7/52 ,  B01L2200/12 ,  B01L2300/0654 ,  B01L2300/0816 ,  G01N21/6454

    Abstract: An integrated semiconductor chemical microreactor (21) for real-time polymerase chain reaction (PCR) monitoring, has a monolithic body (2) of semiconductor material; a number of buried channels (3) formed in the monolithic body (2); an inlet trench (14) and an outlet trench (15) for each buried channel (3); and a monitoring trench (16) for each buried channel (3), extending between the inlet and outlet trenches (14, 15) thereof from the top surface (4) of the monolithic body (2) to the respective buried channel (3). Real-time PCR monitoring is carried out by channeling light beams into the buried channels (3), whereby the light beams impinge on the fluid therein, and by collecting and processing light beams coming out from the monitoring trenches (16) and emitted by the fluid within the buried channels (3).

    Abstract translation: 实时聚合酶链式反应（PCR）监测的集成半导体化学微反应器（21），具有半导体材料的整体式主体（2）; 在整体式主体形成多个掩埋信道（3）（2）; 在入口沟槽（14）和在出口处的沟槽（15），用于各掩埋沟道（3）; 并为每个掩埋沟道的监视沟槽（16）（3）的入口和出口槽（14,15）从所述顶表面之间延伸（4）单块体（2）到respectivement掩埋沟道（3） ， 实时PCR监测是通过窜光束到掩埋信道（3），由此，光束照射在其中的流体，并通过收集和处理光束从监视沟槽出来（16）中进行，并发射的由 掩埋通道内的流体（3）。

    Integrated chemical microreactor, thermally insulated from detection electrodes, and manufacturing method therefor
    36.
    发明公开
    Integrated chemical microreactor, thermally insulated from detection electrodes, and manufacturing method therefor 有权
    集成微反应器的化学，其生产隔热测量电极和方法

    公开(公告)号：EP1193214A1

    公开(公告)日：2002-04-03

    申请号：EP00830640.9

    申请日：2000-09-27

    Applicant: STMicroelectronics S.r.l.

    Inventor： Barlocchi, Gabriele ,  Villa, Flavio

    IPC: B81B3/00 ,  B81C1/00 ,  B01L3/00

    CPC classification number: B01L7/52 ,  B01L3/502707 ,  B01L2200/12 ,  B01L2300/0645 ,  B01L2300/0825 ,  B01L2300/1827 ,  B01L2300/1883

    Abstract: Integrated microreactor, formed in a monolithic body (50) and including a semiconductor material region (2, 23) and an insulating layer (25, 30); a buried channel (21) extending in the semiconductor material region; a first and a second access trench (40a, 40b) extending in the semiconductor material region (2, 23) and in the insulating layer (25, 30), and in communication with the buried channel (21); a first and a second reservoir (41a, 41b) formed on top of the insulating layer (25, 30) and in communication with the first and the second access trench; a suspended diaphragm (45) formed by the insulating layer (25, 30), laterally to the buried channel (21); and a detection electrode (28), supported by the suspended diaphragm (45), above the insulating layer (25, 30), and inside the second reservoir.

    Abstract translation: 集成微反应器中，形成在整体式主体（50）和包含半导体材料区（2，23）和绝缘层（25，30）; 一掩埋沟道（21）中的半导体材料区域延伸; 第一和第二访问沟槽（40A，40B）延伸的半导体材料区（2，23）和在所述绝缘层（25，30）和在与所述埋入通道（21）; 第一和第二贮液器（41A，41B）形成在绝缘层（25，30）和在与所述第一和第二访问沟槽的顶部上; 由绝缘层（25，30），晚反弹至掩埋沟道形成的悬浮隔膜（45）（21）; 并且由悬浮隔膜（45）支撑的检测电极（28），绝缘层（25，30）的上方，并且内部的第二贮存器。

    Process for forming a buried cavity in a semiconductor material wafer
    37.
    发明公开
    Process for forming a buried cavity in a semiconductor material wafer 审中-公开
    Herstellungsverfahren eines vergrabenen Hohlraumes in einer Halbleiterscheibe

    公开(公告)号：EP1130631A1

    公开(公告)日：2001-09-05

    申请号：EP00830148.3

    申请日：2000-02-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Erratico, Pietro ,  Sacchi, Enrico ,  Villa, Flavio ,  Barlocchi, Gabriele ,  Corona, Pietro

    IPC: H01L21/308

    CPC classification number: B81C1/00404

    Abstract: The process comprises the steps of forming, on top of a semiconductor material wafer (10), a holed mask (16) having a lattice structure and comprising a plurality of openings (18) each having a substantially square shape and a side with an inclination of 45° with respect to the flat (110) of the wafer; carrying out an anisotropic etch in TMAH of the wafer (10), using said holed mask (16), thus forming a cavity (20), the cross section of which has the shape of an upside-down isosceles trapezium; and carrying out a chemical vapour deposition (CVD) using TEOS, thus forming a TEOS layer (24) which completely closes the openings of the holed mask (16) and defines a diaphragm (26) overlying the cavity (20) and on which a suspended integrated structure can subsequently be manufactured.

    Abstract translation: 该方法包括以下步骤：在半导体材料晶片（10）的顶部上形成具有格子结构的孔掩模（16），并且包括多个开口（18），每个开口（18）均具有大致正方形的形状， 相对于晶片的平面（110）为45°; 使用所述带孔掩模（16）在晶片（10）的TMAH中进行各向异性蚀刻，从而形成空腔（20），其横截面具有倒立的等腰梯形的形状; 并使用TEOS进行化学气相沉积（CVD），由此形成TEOS层（24），该TEOS层完全封闭了孔罩（16）的开口，并且限定了覆盖空腔（20）的隔膜（26） 随后可以制造悬浮综合结构。

    Process for manufacturing a SOI wafer with buried oxide regions without cusps
    38.
    发明公开
    Process for manufacturing a SOI wafer with buried oxide regions without cusps 审中-公开
    一种制造SOI晶片的方法与隐埋氧化物区域没有峰

    公开(公告)号：EP1049155A1

    公开(公告)日：2000-11-02

    申请号：EP99830256.6

    申请日：1999-04-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Villa, Flavio ,  Barlocchi, Gabriele ,  Corona, Pietro

    IPC: H01L21/762 ,  H01L21/32

    CPC classification number: H01L21/02238 ,  H01L21/02299 ,  H01L21/31662 ,  H01L21/32 ,  H01L21/76208 ,  H01L21/76248

    Abstract: The process comprises the steps of forming, in a wafer (1) of monocrystalline semiconductor material, trenches (45) extending between, and delimiting laterally, protruding regions (48); forming masking regions (55, 56), implanted with nitrogen ions, the masking regions surrounding completely the tips of the protruding regions (48); and forming retarding regions (57) on the bottom of the trenches (45), wherein nitrogen is implanted at a lower dose than the masking regions. A thermal oxidation is then carried out and starts at the bottom portion of the protruding regions (48) and then proceeds downwards; thereby, a continuous region (65) of buried oxide is formed and is overlaid by non-oxidized regions (60) corresponding to the tips of the protruding regions and forming nucleus regions for a subsequent epitaxial growth. The masking regions (55, 56) and the retarding regions (57) are formed through two sucdessive implants, including an angle implant, wherein the protruding regions (48) shield the bottom portions of the adjacent protruding regions (48), as well as the bottom of the trenches (45), and a is made perpendicularly to the wafer (1).

    Abstract translation: 该方法包括形成的步骤中，在单晶半导体材料，沟槽（45）之间延伸，并且限定尾盘反弹，突出区域（48）的晶片（1）; 上方形成掩蔽区域（55，56）中，用氮离子注入，完全包围掩模区调用突出区域的尖端（48）; 以及在所述沟槽的底部区域阻滞（57）（45）worin氮在低于掩蔽区域低剂量植入。 然后，热氧化被执行并且在突出区域（48）的底部部分开始，然后前进向下; 由此，掩埋氧化物的连续区域（65）形成，并且是由非氧化区域（60）对应于所述突出区域的尖端和用于随后的外延生长形成核的区域覆盖。 掩蔽区域（55，56）和所述延迟区（57）通过两个sucdessive植入物形成，包括在角植入物，worin突出区域（48）屏蔽所述相邻突出区域的底部部分（48），以及 所述沟槽的底部（45），和一个垂直于由所述晶片（1）。

    Formation of buried cavities in a monocrystalline semiconductor wafer
    39.
    发明公开
    Formation of buried cavities in a monocrystalline semiconductor wafer 有权
    在einer einkristallinen Halbleiterscheibe的Herstellung von vergrabenenHohlräumen

    公开(公告)号：EP1043770A1

    公开(公告)日：2000-10-11

    申请号：EP99830206.1

    申请日：1999-04-09

    Applicant: STMicroelectronics S.r.l.

    Inventor： Barlocchi, Gabriele ,  Villa, Flavio

    IPC: H01L21/764

    CPC classification number: H01L21/2007 ,  H01L21/30608 ,  H01L21/3086 ,  H01L21/76251 ,  H01L21/76262 ,  H01L21/764

    Abstract: The method allows formation of buried cavities in a wafer (25) of monocrystalline semiconductor material. Initially, at least one cavity (21) is formed in a substrate (10) of monocrystalline semiconductor material, by timed TMAH etching silicon, then the cavity is covered with a material inhibiting epitaxial growth (22); finally, a monocrystalline epitaxial layer (26) is grown above the substrate (10) and the cavities (21). Thereby, the cavity (21) is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane (52). The original wafer (25) must have a plurality of elongate cavities or channels (21), parallel and adjacent to one another. Trenches (44) are then excavated in the epitaxial layer (26), as far as the channels (21), and the dividers between the channels are removed by timed TMAH etching.

    Abstract translation: 该方法允许在单晶半导体材料的晶片（25）中形成掩埋空腔。 首先，通过定时TMAH蚀刻硅在单晶半导体材料的衬底（10）中形成至少一个空腔（21），然后用抑制外延生长的材料（22）覆盖空腔。 最后，单晶外延层（26）生长在基板（10）和空腔（21）之上。 由此，空腔（21）被单晶材料完全包围。 从该晶片开始，可以形成薄膜（52）。 原始晶片（25）必须具有彼此平行并相邻的多个细长空腔或通道（21）。 然后在外延层（26）中挖掘沟槽（44），只要通道（21），并且通过定时TMAH蚀刻去除通道之间的分隔件。

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