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    Method for producing a micromechanical component, and corresponding micromechanical component
    31.
    发明授权
    Method for producing a micromechanical component, and corresponding micromechanical component 有权
    微机械部件的制造方法以及相应的微机械部件

    公开(公告)号：US09593012B2

    公开(公告)日：2017-03-14

    申请号：US14774799

    申请日：2014-03-12

    Applicant: Robert Bosch GmbH

    Inventor： Friedjof Heuck ,  Christoph Schelling

    IPC: B81C1/00

    CPC classification number: B81C1/00619 ,  B81C1/00412 ,  B81C2201/0177 ,  B81C2201/0188

    Abstract: A method for producing a micromechanical component includes providing a substrate with a monocrystalline starting layer which is exposed in structured regions. The structured regions have an upper face and lateral flanks, wherein a catalyst layer, which is suitable for promoting a silicon epitaxial growth of the exposed upper face of the structured monocrystalline starting layer, is provided on the upper face, and no catalyst layers are provided on the flanks. The method also includes carrying out a selective epitaxial growth process on the upper face of the monocrystalline starting layer using the catalyst layer in a reactive gas atmosphere in order to form a micromechanical functional layer.

    Abstract translation: 微机械部件的制造方法包括向基板提供暴露在结构化区域中的单晶起始层。 结构化区域具有上表面和侧面，其中在上表面上设置适合于促进结构单晶起始层暴露的上表面的硅外延生长的催化剂层，并且不提供催化剂层 在侧面。 该方法还包括在反应气体气氛中使用催化剂层在单晶起始层的上表面上进行选择性外延生长工艺，以形成微机械功能层。

    Epi-poly etch stop for out of plane spacer defined electrode
    32.
    发明授权
    Epi-poly etch stop for out of plane spacer defined electrode 有权
    用于外平面间隔物限定电极的Epi-多晶蚀刻停止

    公开(公告)号：US09469522B2

    公开(公告)日：2016-10-18

    申请号：US14201453

    申请日：2014-03-07

    Applicant: Robert Bosch GmbH

    Inventor： Andrew Graham ,  Gary Yama ,  Gary O'Brien

    IPC: B81C1/00 ,  B81B3/00

    CPC classification number: B81B3/0021 ,  B81B2201/0271 ,  B81B2203/04 ,  B81B2203/053 ,  B81C1/00095 ,  B81C1/00166 ,  B81C2201/0132 ,  B81C2201/014 ,  B81C2201/0177 ,  B81C2203/0136

    Abstract: In one embodiment, a method of forming an out-of-plane electrode includes forming an oxide layer above an upper surface of a device layer, etching an etch stop perimeter defining trench extending through the oxide layer, forming a first cap layer portion on an upper surface of the oxide layer and within the etch stop perimeter defining trench, etching a first electrode perimeter defining trench extending through the first cap layer portion and stopping at the oxide layer, depositing a first material portion within the first electrode perimeter defining trench, depositing a second cap layer portion above the deposited first material portion, and vapor releasing a portion of the oxide layer with the etch stop portion providing a lateral etch stop.

    Abstract translation: 在一个实施例中，形成平面外电极的方法包括在器件层的上表面上形成氧化物层，蚀刻限定延伸穿过氧化物层的沟槽的蚀刻停止周界，在第一帽层部分上形成 氧化物层的上表面，并且在蚀刻停止周界内限定沟槽，蚀刻延伸穿过第一盖层部分并停止在氧化物层处的第一电极周界，限定沟槽，在第一电极周界限定沟槽内沉积第一材料部分，沉积 在沉积的第一材料部分上方的第二盖层部分，以及用蚀刻停止部分提供横向蚀刻停止物的一部分氧化物层的蒸气。

    METHOD FOR MANUFACTURING MEMS STRUCTURES
    33.
    发明申请
    METHOD FOR MANUFACTURING MEMS STRUCTURES 审中-公开
    制造MEMS结构的方法

    公开(公告)号：US20100297781A1

    公开(公告)日：2010-11-25

    申请号：US12308530

    申请日：2007-05-23

    Applicant: Andreas Scheurle

    Inventor： Andreas Scheurle

    IPC: H01L21/20 ,  H01L21/66

    CPC classification number: B81C1/00714 ,  B81C2201/0109 ,  B81C2201/0177

    Abstract: A method for manufacturing MEMS structures having at least one functional layer of silicon that contains structures that are exposed by removing a sacrificial layer, at least one sacrificial layer and at least one functional layer being deposited such that they grow in a monocrystalline manner, and the sacrificial layer is made up of a silicon-germanium mixed layer.

    Abstract translation: 一种用于制造具有至少一个硅功能层的MEMS结构的方法，其包含通过去除牺牲层而暴露的结构，至少一个牺牲层和至少一个功能层被沉积成使得它们以单晶方式生长， 牺牲层由硅 - 锗混合层组成。

    Method of forming semiconductor devices through epitaxy
    35.
    发明授权
    Method of forming semiconductor devices through epitaxy 有权
    通过外延形成半导体器件的方法

    公开(公告)号：US07122395B2

    公开(公告)日：2006-10-17

    申请号：US10328922

    申请日：2002-12-23

    Applicant: Bishnu Gogoi

    Inventor： Bishnu Gogoi

    IPC: H01L21/00

    CPC classification number: B81B3/001 ,  B81C2201/0109 ,  B81C2201/0177

    Abstract: A method for creating a semiconductor structure is provided. In accordance with the method, a semiconductor substrate (101) is provided over which is disposed a sacrificial layer (103), and which has a thin single crystal semiconductor layer (105) disposed over the sacrificial layer (103). An opening (107) is then created which extends through the semiconductor layer (105) and into the sacrificial layer (103). The semiconductor layer (105) is then epitaxially grown to a suitable device thickness, thereby resulting in a device layer. The semiconductor layer is grown such that the resulting device layer extends over the opening (107), and such that the surface of the portion of the device layer extending over the opening is single crystal silicon.

    Abstract translation: 提供了一种用于制造半导体结构的方法。 根据该方法，提供半导体衬底（101），在其上设置有牺牲层（103），并且具有设置在牺牲层（103）上方的薄单晶半导体层（105）。 然后产生延伸穿过半导体层（105）并进入牺牲层（103）的开口（107）。 然后将半导体层（105）外延生长至合适的器件厚度，由此产生器件层。 生长半导体层使得所得到的器件层在开口（107）上延伸，并且使得在开口上延伸的器件层的部分的表面是单晶硅。

    Method for manufacturing integrated structures including removing a sacrificial region
    37.
    发明授权
    Method for manufacturing integrated structures including removing a sacrificial region 失效
    包括去除牺牲区域的集成结构的制造方法

    公开(公告)号：US06197655B1

    公开(公告)日：2001-03-06

    申请号：US09113466

    申请日：1998-07-10

    Applicant: Pietro Montanini ,  Marco Ferrera ,  Laura Castoldi ,  Ilaria Gelmi

    Inventor： Pietro Montanini ,  Marco Ferrera ,  Laura Castoldi ,  Ilaria Gelmi

    IPC: H01L2176

    CPC classification number: B81C1/00476 ,  B81B2203/033 ,  B81C1/00801 ,  B81C2201/0177 ,  B81C2201/053 ,  G01C19/56 ,  G01P15/0802 ,  G01P15/097 ,  G01P15/125 ,  H01L21/76202 ,  H01L21/764

    Abstract: The method is based on the use of a silicon carbide mask for removing a sacrificial region. In case of manufacture of integrated semiconductor material structures, the following steps are performed: forming a sacrificial region of silicon oxide on a substrate of semiconductor material; growing a pseudo-epitaxial layer; forming electronic circuit components; depositing a silicon carbide layer; defining photolithographically the silicon carbon layer so as to form an etching mask containing the topography of a microstructure to be formed; with the etching mask, forming trenches in the pseudo-epitaxial layer as far as the sacrificial region so as to laterally define the microstructure; and removing the sacrificial region through the trenches.

    Abstract translation: 该方法基于使用碳化硅掩模去除牺牲区域。 在制造集成半导体材料结构的情况下，执行以下步骤：在半导体材料的衬底上形成氧化硅牺牲区; 生长伪外延层; 形成电子电路部件; 沉积碳化硅层; 光刻地定义硅碳层，以形成含有要形成的微结构的形貌的蚀刻掩模; 利用蚀刻掩模，在伪外延层中形成直到牺牲区域的沟槽，以横向限定微结构; 并通过沟槽去除牺牲区域。

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