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公开(公告)号：EP1761119B1
公开(公告)日：2011-07-20
申请号：EP06018353.0
申请日：2006-09-01
Applicant: NGK SPARK PLUG CO., LTD
Inventor： Urashima, Kazuhiro , Yuri, Shinji , Sato, Manabu , Sugimoto, Yasuhiro
CPC classification number: H05K1/185 , H01G2/06 , H01G4/385 , H01L23/49816 , H01L23/50 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/09701 , H01L2924/14 , H01L2924/15174 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/3025 , H05K1/0231 , H05K3/4602 , H05K2201/10045 , H05K2201/10674 , H05K2201/10712 , H01L2224/05599
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32.发明授权
公开(公告)号：EP1082732B1
公开(公告)日：2009-06-24
申请号：EP00906973.3
申请日：2000-01-20
Applicant: MOTOROLA, INC.
Inventor： LEE, Tien , LACH, Lawrence , DUNN, Gregory, J.
CPC classification number: H05K1/167 , H05K3/0023 , H05K3/4644 , H05K2201/0187 , H05K2201/0317 , H05K2201/09509 , H05K2201/09672 , H05K2201/09845 , H05K2201/10045 , H05K2203/0361 , Y10T29/49082
Abstract: A thin-film metal resistor (44) suitable for a multilayer printed circuit board (12), and a method for its fabrication. The resistor (44) generally has a multilayer construction, with the individual layers (34, 38) of the resistor (44) being self-aligned with each other so that a negative mutual inductance is produced that very nearly cancels out the self-inductance of each resistor layer (34, 38). As a result, the resistor (44) has a very low net parasitic inductance. In addition, the multilayer construction of the resistor (44) reduces the area of the circuit board (12) required to accommodate the resistor (44), and as a result reduces the problem of parasitic interactions with other circuit elements on other layers of the circuit board (12).
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公开(公告)号：EP1761118A1
公开(公告)日：2007-03-07
申请号：EP06018351.4
申请日：2006-09-01
Applicant: NGK SPARK PLUG CO., LTD
Inventor： Urashima, Kazuhiro , Yuri, Shinji , Sato, Manabu , Ogawa, Kohki
CPC classification number: H05K1/185 , H01G2/06 , H01G4/40 , H01L21/568 , H01L21/6835 , H01L23/49822 , H01L23/49838 , H01L24/81 , H01L2221/68345 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2224/81192 , H01L2224/81801 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01042 , H01L2924/01047 , H01L2924/01056 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/351 , H05K1/0233 , H05K1/0234 , H05K3/4602 , H05K2201/10045 , H05K2201/10674 , H05K2201/10712 , H01L2924/00 , H01L2224/05599
Abstract: A wiring board comprising: a board core (11) having a core main surface (12) and a core reverse surface (13); a capacitor (101, 101A, 101B, 101C, IO1D, 101E, 101F, 101G, 101H, 101J, 1101, 1101', 1101", 1101''',1101'''',1101''''') having a capacitor main surface (102) and a capacitor reverse surface (103) and having a structure in which first inner electrode layers (141) and second inner electrode layers (142) are alternately laminated and arranged via a dielectric layer (105), the capacitor (101, 101A, 101B, 101C, 101D, 101E, 101F, 101G; 101H, 101J, 1101, 1101', 1101'', 1101''', 1101'''', 1101 ""') being accommodated in the board core (11) in a state in which the core main surface (12) and the capacitor main surface (102) are oriented on a same side; and a wiring laminated portion (31) having a structure in which interlayer insulating layers (33, 35) and conductor layers (42) are alternately laminated on the core main surface (12) and the capacitor main surface (102), wherein an inductor (251, 252, 253) or a resistor (301, 302, 311, 312, 321, 322) is formed on or in the capacitor (101, 101A, 101B, 101C, 101D, 101E, 101F, 101G, 101H, 101J, 1101, 1101', 1101", 1101"', 1101'''', 1101''''').
Abstract translation: 一种布线板，包括：具有芯主表面（12）和芯反向表面（13）的板芯（11）; 具有电容器（101,101A，101B，101C，101D，101E，101F，101G，101H，101J，1101,1101'，1101“，1101”'，1101“，1101” 电容器主表面（102）和电容器反面（103），并且具有其中第一内电极层（141）和第二内电极层（142）经由电介质层（105）交替层叠并布置的结构， 1101“，1101”，1101“”，1101“，1101”，“1101”，1101“，1011”，1011“，1011”，1011“，1101” 在芯主表面（12）和电容器主表面（102）位于同一侧的状态下的板芯（11）;以及布线层叠部（31），其具有层间绝缘层 33，35）和导体层（42）交替层叠在芯主表面（12）和电容器主表面（102）上，其中电感器（251,252,253）或电阻器 312,301,322）形成在电容器（101,101A，1）上或电容器（101,101A）中 01B，101C，101D，101E，101F，101G，101H，101J，1101,1101'，1101“，1101”'，1101“'，1101”''
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公开(公告)号：EP0030335A3
公开(公告)日：1984-05-16
申请号：EP80107433
申请日：1980-11-27
Applicant: Siemens Aktiengesellschaft
Inventor： Hadersbeck, Hans , Zukier, Hubert
CPC classification number: H05K13/04 , H05K3/3415 , H05K3/3442 , H05K3/3447 , H05K3/3468 , H05K2201/09181 , H05K2201/10015 , H05K2201/10022 , H05K2201/10045 , H05K2201/10446 , H05K2201/1053 , H05K2201/10545 , H05K2201/10651 , H05K2203/0455 , H05K2203/1572 , Y02P70/613
Abstract: Temperaturfeste elektrische Bauteile, insbesondere R-Netzwerke, sind auf der Lötseite einer Leiterplatte ange ordnet. Bauteile, die für die Anbringung an der Lötseite einer Leiterplatte vorgesehen sind, weisen an ihrer Träger platte an den Anschlußstellen Ausnehmungen für die An kontaktierung auf. Die Ausnehmungen sind abgeschrägt. Das R-Netzwerk überdeckt den Anschlußfleck auf der Leiterplatte nur zur Hälfte.
Abstract translation: 印刷电路板具有设置在电路板的焊接侧的诸如电阻网络的温度稳定的电气部件。 安装在板的焊接侧的部件被安装为包含网络的单元，该单元具有部分地围绕电路板的焊接连接位置的凹部，在该点处，整体部件电连接和机械地连接到板 。 这些凹槽是倾斜的以便于焊料流动，并且覆盖电路板的大约一半的连接位置。
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公开(公告)号：EP0030335A2
公开(公告)日：1981-06-17
申请号：EP80107433.7
申请日：1980-11-27
Applicant: SIEMENS AKTIENGESELLSCHAFT
Inventor： Hadersbeck, Hans , Zukier, Hubert
CPC classification number: H05K13/04 , H05K3/3415 , H05K3/3442 , H05K3/3447 , H05K3/3468 , H05K2201/09181 , H05K2201/10015 , H05K2201/10022 , H05K2201/10045 , H05K2201/10446 , H05K2201/1053 , H05K2201/10545 , H05K2201/10651 , H05K2203/0455 , H05K2203/1572 , Y02P70/613
Abstract: Temperaturfeste elektrische Bauteile, insbesondere R-Netzwerke, sind auf der Lötseite einer Leiterplatte angeordnet. Bauteile, die für die Anbringung an der Lötseite einer Leiterplatte vorgesehen sind, weisen an ihrer Trägerplatte an den Anschlußstellen Ausnehmungen für die Ankontäktierung auf. Die Ausnehmungen sind abgeschrägt. Das R-Netzwerk überdeckt den Anschlußfleck auf der Leiterplatte nur zur Hälfte.
Abstract translation: 印刷电路板具有设置在电路板的焊接侧的诸如电阻网络的温度稳定的电气部件。 安装在板的焊接侧的部件被安装为包含网络的单元，该单元具有部分地围绕电路板的焊接连接位置的凹部，在该点处，整体部件电连接和机械地连接到板 。 这些凹槽是倾斜的以便于焊料流动，并且覆盖电路板的大约一半的连接位置。
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Patent Agency Ranking
公开(公告)号：EP1744604A1
公开(公告)日：2007-01-17
申请号：EP05291510.5
申请日：2005-07-12
Applicant: ALCATEL
Inventor： Wiegner, Dirk , Merk, Thomas
CPC classification number: H03F3/195 , H03F2200/144 , H03F2200/147 , H03F2200/451 , H05K1/0243 , H05K1/181 , H05K2201/10045 , H05K2201/10166 , H05K2201/10515 , H05K2201/1053 , Y02P70/611
Abstract: An amplifier, in particular for RF-applications, comprises a circuit board (2), at least one amplifier stage with at least one transistor package (8) arranged on the circuit board (2), and a feedback path (12) around the at least one transistor package (8), said feedback path (12) comprising a feedback element (15) with at least one capactive (C) element for blocking the flow of direct current through the feedback path (12) and preferably further comprising at least one inductive (L) and/or resistive element (R). In order to reduce negative effects on the performance of the amplifier due to long printed feedback lines, the feedback path (12) in an amplifier according to the invention is formed of a feedback bridge (9) comprising two feedback lines (13, 14) extending out of the plane of the circuit board (2) from two contact flags (10, 11) of the transistor package (8), and the feedback element (15) bridging over the transistor package (8) between the two feedback lines (13, 14).
Abstract translation: 特别是用于射频应用的放大器包括电路板（2），至少一个具有布置在电路板（2）上的至少一个晶体管封装（8）的放大器级，以及围绕 至少一个晶体管封装（8），所述反馈路径（12）包括具有至少一个负载（C）元件的反馈元件（15），用于阻断通过所述反馈路径（12）的直流电流，并且优选地还包括： 至少一个电感（L）和/或电阻元件（R）。 为了减少由于长的印刷反馈线引起的放大器的性能的负面影响，根据本发明的放大器中的反馈路径（12）由包括两个反馈线（13,14）的反馈桥（9）形成， 从晶体管封装（8）的两个接触标记（10,11）延伸出电路板（2）的平面，并且反馈元件（15）跨接在两个反馈线之间的晶体管封装（8）上 13,14）。
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公开(公告)号：EP1362501A1
公开(公告)日：2003-11-19
申请号：EP02710277.1
申请日：2002-02-14
Applicant: Koninklijke Philips Electronics N.V.
Inventor： HORIE, Kenichi
CPC classification number: H05K1/186 , H01L23/66 , H01L24/48 , H01L2224/05599 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/85399 , H01L2924/00014 , H01L2924/01012 , H01L2924/0102 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12042 , H01L2924/15153 , H01L2924/1517 , H01L2924/19041 , H01L2924/3025 , H05K1/0306 , H05K1/183 , H05K3/4611 , H05K3/4629 , H05K2201/10045 , H05K2201/10636 , Y02P70/611 , H01L2924/00 , H01L2224/45015 , H01L2924/207
Abstract: A system and method for formatting broadcast/Internet contents according to the preferences of the user in terms of content, format, and presentation style, then presented in the time-slot specified by the user is disclosed. The system executes the following steps of: retrieving programs of interest to the user; storing the retrieved contents into a storage device; customizing stored contents according to predetermined criteria; and, displaying the customized contents corresponding to a time selected by a user. The user specifies the format of the whole program in terms of programs of interests, the length of the programs with respect to the whole program, and the presentation style of the whole program.
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公开(公告)号：EP0995207A1
公开(公告)日：2000-04-26
申请号：EP98921208.9
申请日：1998-05-14
Applicant: AVX CORPORATION
Inventor： DUPRE', David, A. , GALVAGNI, John, L. , RITTER, Andrew, P.
IPC: H01G4/005 , H01G4/012 , H01G4/008 , H01G4/228 , H01G2/20 , H01G4/248 , H01G4/06 , H01G4/20 , H05K1/18 , H05K7/02 , H01R9/00
CPC classification number: H01G2/065 , H01G4/30 , H05K1/0216 , H05K1/0231 , H05K1/112 , H05K3/3442 , H05K2201/09381 , H05K2201/09663 , H05K2201/0979 , H05K2201/10045 , H05K2201/10636 , Y02P70/611 , Y02P70/613
Abstract: A multilayer ceramic device (38) has a capacitor body (42) defining a plurality of electrical terminals on an outer surface thereof. The terminals are interdigitated such that a respective first polarity terminal (44) will be adjacent to a respective second polarity terminal (46) (and vice versa). The capacitor body (42) contains a plurality of interleaved capacitor plates in opposed and spaced apart relation. Capacitor plates of the first polarity are electrically connected to respective first polarity terminals via a plurality of lead structures. Likewise, a plurality of lead structures electrically connect capacitor plates of the second polarity to respective second polarity terminals.
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公开(公告)号：EP0031283B1
公开(公告)日：1984-05-16
申请号：EP80401811.7
申请日：1980-12-17
Inventor： Blangeard, Gérard , Bulte, Jean-Claude , Lerault, Raymond
CPC classification number: H05K1/167 , H01L23/647 , H01L27/016 , H01L2924/0002 , H01L2924/3011 , H05K2201/0317 , H05K2201/10045 , H01L2924/00
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公开(公告)号：EP0031283A3
公开(公告)日：1981-10-07
申请号：EP80401811
申请日：1980-12-17
Inventor： Blangeard, Gérard , Bulte, Jean-Claude , Lerault, Raymond
CPC classification number: H05K1/167 , H01L23/647 , H01L27/016 , H01L2924/0002 , H01L2924/3011 , H05K2201/0317 , H05K2201/10045 , H01L2924/00
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