무선 한방용 자기침 시스템
    61.
    发明公开
    무선 한방용 자기침 시스템 有权
    一种用于过渡性药物的无线磁针系统

    公开(公告)号:KR1020100069145A

    公开(公告)日:2010-06-24

    申请号:KR1020080127752

    申请日:2008-12-16

    CPC classification number: A61N2/02 A61H39/08 A61N2/002 A61N2/06

    Abstract: PURPOSE: A wireless magnetic needle system for an oriental medical treatment is provided to apply a various intensity and form of magnetic stimulation after a normal acupuncture. CONSTITUTION: A wireless magnetic needle system for an oriental medical treatment comprises a current generating apparatus(100) generating current, a first coaxial coil(210) formed on the upper bed by using the current created in the current generating apparatus, a helmholtz coil forming magnetic field(200) by a second coaxial coil(220) formed in the lower part of bed, a modulator changing the current created in the current generating apparatus, and an amplifier amplifying the changed current in modulator. A current generating apparatus generates a current having the one waveform among the rectangular pulse, and the sine wave or the saw tooth wave.

    Abstract translation: 目的:提供用于东方医疗的无线磁针系统,以在正常针灸后施加各种强度和形式的磁刺激。 构成:用于东方医疗的无线磁针系统包括产生电流的电流产生装置(100),通过使用在电流发生装置中产生的电流形成在上床上的第一同轴线圈(210),形成亥姆霍兹线圈 通过形成在床的下部的第二同轴线圈(220)的磁场(200),改变在当前发电装置中产生的电流的调制器和放大调制器中改变的电流的放大器。 电流产生装置产生矩形脉冲,正弦波或锯齿波中具有一个波形的电流。

    고집적 반도체 메모리 소자 및 그 제조방법
    62.
    发明公开
    고집적 반도체 메모리 소자 및 그 제조방법 有权
    高密度半导体存储器件及其制造方法

    公开(公告)号:KR1020080051010A

    公开(公告)日:2008-06-10

    申请号:KR1020070094687

    申请日:2007-09-18

    Abstract: A highly-integrated semiconductor memory device and a manufacturing method thereof are provided to correctly read data by suppressing a leakage current generated as the semiconductor memory device is highly integrated. A source/drain electrode(220A) are formed on a silicon substrate to form a schottky junction with a channel region(220B). A floating gate composed of plural silicon nanodots(260A) is formed on the substrate of the channel region. The silicon nanodot is made of a silicon compound as a basal body, and a gate dielectric layer(270) is formed on the floating gate. A tunneling dielectric layer(250) is formed between the substrate of the channel region and the floating gate, and a control gate(280) is formed on the floating gate.

    Abstract translation: 提供了一种高度集成的半导体存储器件及其制造方法,以通过抑制半导体存储器件高集成度时产生的漏电流来正确读取数据。 源极/漏极(220A)形成在硅衬底上以与沟道区(220B)形成肖特基结。 在沟道区的基板上形成由多个硅纳米点(260A)构成的浮置栅极。 硅纳米棒由硅化合物作为基体,在浮栅上形成栅介质层(270)。 在沟道区的衬底和浮置栅极之间形成隧穿电介质层(250),并且在浮动栅极上形成控制栅极(280)。

    반도체 메모리 소자 및 그 구동방법
    63.
    发明公开
    반도체 메모리 소자 및 그 구동방법 有权
    半导体存储器件及其驱动方法

    公开(公告)号:KR1020080051009A

    公开(公告)日:2008-06-10

    申请号:KR1020070094686

    申请日:2007-09-18

    CPC classification number: H01L27/108 H01L27/095 H01L29/66257

    Abstract: A semiconductor memory device and a driving method thereof are provided to store an electric charge in a channel region by using a schottky barrier formed at an interface between a channel region and a source/drain electrode. A gate(160) is formed over a channel region(130) of a silicon substrate(100). A source electrode(110) and a drain electrode(120) are formed on the silicon substrate to form a schottky junction with the channel region. An electric charge is stored in a schottky barrier formed between the source electrode and the drain electrode. The source electrode and the drain electrode are made of same or different metal silicide. A level of the schottky junction between the channel region and the source electrode is identical to or different from a level of the schottky barrier between the channel region and the drain electrode.

    Abstract translation: 提供一种半导体存储器件及其驱动方法,通过使用在沟道区域和源极/漏极之间的界面处形成的肖特基势垒来在沟道区域中存储电荷。 在硅衬底(100)的沟道区(130)上形成栅极(160)。 在硅衬底上形成源电极(110)和漏电极(120),以形成与沟道区域的肖特基结。 在源电极和漏电极之间形成的肖特基势垒中存储电荷。 源电极和漏电极由相同或不同的金属硅化物制成。 沟道区和源电极之间的肖特基结的电平与沟道区和漏电极之间的肖特基势垒的电平相同或不同。

    낮은 쇼트키 장벽 관통 트랜지스터 및 그 제조방법
    64.
    发明授权
    낮은 쇼트키 장벽 관통 트랜지스터 및 그 제조방법 失效
    制造具有低势垒高度的肖特基势垒MOSFET及其制造方法

    公开(公告)号:KR100777101B1

    公开(公告)日:2007-11-19

    申请号:KR1020060074492

    申请日:2006-08-08

    Abstract: 본 발명은 비등방 에칭을 통해 생성되는 실리콘 (111)면(결정구조를 갖는 반도체에서 그 결정방향을 나타내는 밀러 지수)에 쇼트키 접합을 형성시켜 안정적이고, 전자에 대해 낮은 쇼트키 장벽을 갖는 고성능의 N-형 쇼트키 장벽 관통 트랜지스터를 제작하기 위한 것이다. 이를 위하여, 본 발명의 일실시 예에 따른 쇼트키 장벽 관통 트랜지스터는, 기판; 상기 기판 상에 형성된 소오스 및 드레인; 상기 소오스와 드레인 사이에 형성된 채널; 상기 채널 상에 순차적으로 형성된 게이트 절연막 및 게이트 전극;상기 게이트 절연막 및 게이트 전극의 양측 벽에 형성된 측벽 절연막을 포함하되, 상기 소오스 및 드레인과 상기 채널의 경계면은 실리콘 (111)면을 가지며, 상기 실리콘 (111)면, 소오스 및 드레인이 금속 물질로 실리사이드화되어 쇼트키 접합된다.
    쇼트키 장벽 관통, 비등방 식각

    실리콘 기반 광소자 및 그 제조방법
    65.
    发明授权
    실리콘 기반 광소자 및 그 제조방법 失效
    硅基光学器件及其制造方法

    公开(公告)号:KR100776648B1

    公开(公告)日:2007-11-19

    申请号:KR1020060123236

    申请日:2006-12-06

    CPC classification number: H01L33/0004 H01L27/15 H01L33/06 H01L33/16 H01L33/34

    Abstract: A silicon-based optical device and a method for manufacturing the same are provided to simplify a manufacturing process by using a general CMOS(Complementary Metal-Oxide Semiconductor) manufacturing method. A first and second transistors(100,101) are formed by using different conductive materials based on a silicon substrate(110), respectively. An active layer(119) is formed within the substrate between the first and second transistors. The active layer is formed with one quantum dot which is selected from a group including a silicon quantum dot formed within a silicon nitride layer, a silicon quantum dot formed within a silicon oxide layer, and a compound quantum dot. The compound quantum dot is selected from a group including GaAs, InAs, InGaAs, InAlAs, and InP. Each of the first and second transistors includes a gate insulating layer(113) formed on the substrate, gate electrodes(114A,114B) formed on the gate insulating layer, and a junction area(116) formed within the substrate exposed toward one side of the gate electrode.

    Abstract translation: 提供硅基光学器件及其制造方法,以通过使用通用CMOS(互补金属氧化物半导体)制造方法来简化制造工艺。 第一和第二晶体管(100,101)分别通过使用基于硅衬底(110)的不同导电材料形成。 在第一和第二晶体管之间的衬底内形成有源层(119)。 有源层形成有一个量子点,其从包括在氮化硅层内形成的硅量子点的点,在氧化硅层内形成的硅量子点和化合物量子点组成。 化合物量子点选自包括GaAs,InAs,InGaAs,InAlAs和InP的组。 第一晶体管和第二晶体管中的每一个包括形成在基板上的栅极绝缘层(113),形成在栅极绝缘层上的栅电极(114A,114B)和形成在基板内的接合区域(116) 栅电极。

    쇼트키 장벽 관통 트랜지스터 및 그 제조 방법
    66.
    发明授权
    쇼트키 장벽 관통 트랜지스터 및 그 제조 방법 失效
    肖特基势垒隧道晶体管及其制造方法

    公开(公告)号:KR100698013B1

    公开(公告)日:2007-03-23

    申请号:KR1020050119409

    申请日:2005-12-08

    Abstract: A schottky barrier tunneling transistor and a method for manufacturing the same are provided to minimize leakage current of a gate by recovering damage of an insulating layer of a gate sidewall of the same according to a silicide process. A channel layer is formed on an upper surface of an SOI substrate(6). A source and drain(9) is formed at both ends of the channel layer on the SOI substrate. A gate(12) is formed on the channel layer. A first gate insulating layer is formed to shield the gate from the source and drain and the channel layer. A second gate insulating layer is formed between the first gate insulating layer and the gate.

    Abstract translation: 提供肖特基势垒隧道晶体管及其制造方法,以通过根据硅化物处理来恢复其栅极侧壁的绝缘层的损坏来最小化栅极的漏电流。 沟道层形成在SOI衬底(6)的上表面上。 源极和漏极(9)形成在SOI衬底上的沟道层的两端。 在沟道层上形成栅极(12)。 形成第一栅极绝缘层以屏蔽栅极与源极和漏极以及沟道层。 在第一栅极绝缘层和栅极之间形成第二栅极绝缘层。

    쇼트키 장벽 관통 트랜지스터 및 그 제조방법
    67.
    发明授权
    쇼트키 장벽 관통 트랜지스터 및 그 제조방법 失效
    肖特基势垒隧道及其制造方法

    公开(公告)号:KR100586178B1

    公开(公告)日:2006-06-07

    申请号:KR1020030097061

    申请日:2003-12-26

    CPC classification number: H01L29/47

    Abstract: 본 발명은 SOI 기판을 이용한 쇼트키 장벽 관통 트랜지스터 및 그 제조방법으로, 종래의 불순물을 주입하여 소스 및 드래인 영역을 구성하는 방식의 전계효과 트랜지스터 대신에 소스 및 드레인을 실리콘과 금속의 반응 물질인 실리사이드로 대체하여 금속-반도체간에 형성되는 쇼트키 장벽을 이용하여 제작하는 쇼트키 장벽 관통 트랜지스터를 제공한다.
    쇼트키, SOI, 실리사이드, MOSFET

    집광 격자 결합기의 집광각 측정 장치
    68.
    发明授权
    집광 격자 결합기의 집광각 측정 장치 失效
    집광격자자기의집광각측정장치

    公开(公告)号:KR100462481B1

    公开(公告)日:2004-12-17

    申请号:KR1020020008298

    申请日:2002-02-16

    Abstract: PURPOSE: A focusing angle measuring apparatus of a focusing waveguide grating coupler is provided to precisely measure a focusing angle of the focusing waveguide grating coupler by using a wide-band optical system, thereby minimizing process and design errors. CONSTITUTION: Light radiated from a wide-band light source(201) is guided into one plane of an image detecting device(211) through a photo guide(202), openings(203,205,206), a relay lens(204), a focusing lens(208) and a beam splitter(207) so that an image of a focusing grating(210) is formed on the plate of the image detecting device(211). At the same time, light is diffracted by means of the focusing grating(210) so that a focus(213) of light is formed. Focusing light(215) is formed on one plane of an image detecting device(211) by means of the focusing lens(208). That is, a shape of the opening(205) is formed on the plane of the image detecting device(211).

    Abstract translation: 目的:提供一种聚焦波导光栅耦合器的聚焦角度测量装置,用于通过使用宽带光学系统来精确测量聚焦波导光栅耦合器的聚焦角,从而最小化过程和设计误差。 组成:从宽带光源(201)辐射的光通过光导(202),开口(203,205,206),中继透镜(204),聚焦透镜(204)被引导到图像检测装置(211) (208)和分束器(207),从而在图像检测装置(211)的板上形成聚焦光栅(210)的图像。 同时,光通过聚焦光栅(210)衍射,从而形成光的焦点(213)。 聚焦光(215)通过聚焦透镜(208)形成在图像检测装置(211)的一个平面上。 即,在图像检测装置(211)的平面上形成开口(205)的形状。

    집광 격자 결합기의 집광각 측정 장치
    69.
    发明公开
    집광 격자 결합기의 집광각 측정 장치 失效
    用于测量聚焦角度的聚焦波长光栅耦合器的装置

    公开(公告)号:KR1020030068709A

    公开(公告)日:2003-08-25

    申请号:KR1020020008298

    申请日:2002-02-16

    Abstract: PURPOSE: A focusing angle measuring apparatus of a focusing waveguide grating coupler is provided to precisely measure a focusing angle of the focusing waveguide grating coupler by using a wide-band optical system, thereby minimizing process and design errors. CONSTITUTION: Light radiated from a wide-band light source(201) is guided into one plane of an image detecting device(211) through a photo guide(202), openings(203,205,206), a relay lens(204), a focusing lens(208) and a beam splitter(207) so that an image of a focusing grating(210) is formed on the plate of the image detecting device(211). At the same time, light is diffracted by means of the focusing grating(210) so that a focus(213) of light is formed. Focusing light(215) is formed on one plane of an image detecting device(211) by means of the focusing lens(208). That is, a shape of the opening(205) is formed on the plane of the image detecting device(211).

    Abstract translation: 目的:提供一种聚焦波导光栅耦合器的聚焦角测量装置,通过使用宽带光学系统精确测量聚焦波导光栅耦合器的聚焦角度,从而最小化处理和设计误差。 构成:从宽带光源(201)照射的光通过光引导件(202)引导到图像检测装置(211)的一个平面,开口(203,205,206),中继透镜(204),聚焦透镜 (208)和分束器(207),使得聚焦光栅(210)的图像形成在图像检测装置(211)的板上。 同时,光被聚焦光栅(210)衍射,从而形成光的聚焦(213)。 聚焦光(215)通过聚焦透镜(208)形成在图像检测装置(211)的一个平面上。 也就是说,在图像检测装置(211)的平面上形成开口(205)的形状。

    마이크로파유전체세라믹조성물
    70.
    发明公开
    마이크로파유전체세라믹조성물 失效
    微波电介质陶瓷组合物

    公开(公告)号:KR1020000019365A

    公开(公告)日:2000-04-06

    申请号:KR1019980037412

    申请日:1998-09-10

    CPC classification number: C04B35/49

    Abstract: PURPOSE: A novel dielectric ceramic composition which dielectric constant and quality factor are high by sintering at 1250 to 1400°C, and coefficient of resonant frequency is easy to be controlled. CONSTITUTION: Additive which is one of compounds containing Ba and compounds containing Sr or mixture of the compounds is added into dielectric ceramic composition having 25 to 43 weight % of TiO2, 39 to 57 weight % of ZrO2, and 28 weight % of SnO2 as main compositions. 0.2 to 8.0 weight % of additives is added into main composition. The compounds containing Ba is one of BaCO3, BaTiO3 and BaZrO3. The Sr containing compound is one of SrCO3, SrTiO3 and SrZrO3. The mixture is calcined, formed and sintered to produce microwave dielectric ceramic having the above mentioned properties.

    Abstract translation: 目的:一种新型介电陶瓷组合物,其介电常数和品质因数在1250〜1400℃下烧结较高,谐振频率系数易于控制。 构成:将含有Ba的化合物和含有Sr或其混合物的化合物的添加剂加入到具有25〜43重量%的TiO 2,39〜57重量%的ZrO 2和28重量%的SnO 2作为主体的电介质陶瓷组合物中 成分。 将0.2〜8.0重量%的添加剂加入到主要组合物中。 含Ba的化合物是BaCO3,BaTiO3和BaZrO3之一。 含Sr化合物是SrCO3,SrTiO3和SrZrO3之一。 将混合物煅烧,形成并烧结以产生具有上述特性的微波介电陶瓷。

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