Abstract:
In a method for manufacturing a micromechanical membrane structure, a doped area is created in the front side of a silicon substrate, the depth of which doped area corresponds to the intended membrane thickness, and the lateral extent of which doped area covers at least the intended membrane surface area. In addition, in a DRIE (deep reactive ion etching) process applied to the back side of the silicon substrate, a cavity is created beneath the doped area, which DRIE process is aborted before the cavity reaches the doped area. The cavity is then deepened in a KOH etching process in which the doped substrate area functions as an etch stop, so that the doped substrate area remains as a basic membrane over the cavity.
Abstract:
A method for producing porous microneedles (10) situated in an array on a silicon substrate includes: providing a silicon substrate, applying a first etching mask, patterning microneedles using a DRIE process (“deep reactive ion etching”), removing the first etching mask, at least partially porosifying the Si substrate, the porosification beginning on the front side of the Si substrate and a porous reservoir being formed.
Abstract:
There is disclosed a method of treating a substrate material or a film present on the material surface comprising cyclically performing the following steps: (a) etching the material or film; (b) depositing or forming a passivation layer on the surfaces of an etched feature; and (c) selectively removing the passivation layer from the etched feature in order that the etching proceeds in a direction substantially perpendicular to the material or film surface. At least one of the steps (a) or (b) is performed in the absence of a plasma. Also disclosed is an apparatus for performing the method.
Abstract:
A process cycles between etching and passivating chemistries to create rough sidewalls that are converted into small structures. In one embodiment, a mask is used to define lines in a single crystal silicon wafer. The process creates ripples on sidewalls of the lines corresponding to the cycles. The lines are oxidized in one embodiment to form a silicon wire corresponding to each ripple. The oxide is removed in a further embodiment to form structures ranging from micro sharp tips to photonic arrays of wires. Fluidic channels are formed by oxidizing adjacent rippled sidewalls. The same mask is also used to form other structures for MEMS devices.
Abstract:
A method for adjusting with high precision the width of gaps between micromachined structures or devices in an epitaxial reactor environment. Providing a partially formed micromechanical device, comprising a substrate layer, a sacrificial layer including silicon dioxide deposited or grown on the substrate and etched to create desired holes and/or trenches through to the substrate layer, and a function layer deposited on the sacrificial layer and the exposed portions of the substrate layer and then etched to define micromechanical structures or devices therein. The etching process exposes the sacrificial layer underlying the removed function layer material. Cleaning residues from the surface of the device, then epitaxially depositing a layer of gap narrowing material selectively on the surfaces of the device. The selection of deposition surfaces determined by choice of materials and the temperature and pressure of the epitaxy carrier gas. The gap narrowing epitaxial deposition continues until a desired gap width is achieved, as determined by, for example, an optical detection arrangement. Following the gap narrowing step, the micromachined structures or devices may be released from their respective underlying sacrificial layer.
Abstract:
A method for adjusting with high precision the width of gaps between micromachined structures or devices in an epitaxial reactor environment. Providing a partially formed micromechanical device, comprising a substrate layer, a sacrificial layer including silicon dioxide deposited or grown on the substrate and etched to create desired holes and/or trenches through to the substrate layer, and a function layer deposited on the sacrificial layer and the exposed portions of the substrate layer and then etched to define micromechanical structures or devices therein. The etching process exposes the sacrificial layer underlying the removed function layer material. Cleaning residues from the surface of the device, then epitaxially depositing a layer of gap narrowing material selectively on the surfaces of the device. The selection of deposition surfaces determined by choice of materials and the temperature and pressure of the epitaxy carrier gas. The gap narrowing epitaxial deposition continues until a desired gap width is achieved, as determined by, for example, an optical detection arrangement. Following the gap narrowing step, the micromachined structures or devices may be released from their respective underlying sacrificial layer.
Abstract:
Improved fabrication processes for microelectromechanical structures, and unique structures fabricated by the improved processes are disclosed. In its simplest form, the fabrication process is a modification of the know SCREAM process, extended and used in such a way as to produce a combined vertical etch and release RIE process, which may be referred to as a nullcombination etchnull. Fabrication of a single-level micromechanical structure using the process of the present invention includes a novel dry etching process to shape and release suspended single crystal silicon elements, the process combining vertical silicon reactive ion etching (Si-RIE) and release etches to eliminate the need to deposit and pattern silicon dioxide mask layers on the sides of suspended structures and to reduce the mechanical stresses in suspended structures caused by deposited silicon dioxide films.
Abstract:
A single mask, low temperature reactive ion etching process for fabricating high aspect ratio, released single crystal microelectromechanical structures independently of crystal orientation.
Abstract:
A semiconductor device production method includes performing trench etching to form a trench in a thickness direction of a semiconductor layer so that both of a first pattern portion and a second pattern portion whose side walls face each other across the trench are formed. In the trench etching, the semiconductor layer is etched and removed while a protective film is formed on a surface of the semiconductor layer, and the trench etching is performed so that the first pattern portion and the second pattern portion are configured to have a same potential or a same temperature during the trench etching.
Abstract:
A system and method for manipulating the structural characteristics of a MEMS device include etching a plurality of holes into the surface of a MEMS device, wherein the plurality of holes comprise one or more geometric shapes determined to provide specific structural characteristics desired in the MEMS device.