中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

219 records (took 0.022 seconds)

    PRINTED WIRING BOARD AND ITS METHOD OF MANUFACTURE
    61.
    发明公开
    PRINTED WIRING BOARD AND ITS METHOD OF MANUFACTURE 审中-公开
    LEERRPLATTE UND VERFAHREN ZUR DEREN HERSTELLUNG

    公开(公告)号：EP3072682A1

    公开(公告)日：2016-09-28

    申请号：EP16166102.0

    申请日：2013-03-26

    Applicant: JX Nippon Mining & Metals Corporation

    Inventor： NAGAURA, Tomota ,  KOHIKI, Michiya ,  MORIYAMA, Terumasa

    IPC: B32B15/01 ,  B32B3/30 ,  H05K1/09 ,  H05K3/06 ,  H05K3/24

    CPC classification number: H05K1/09 ,  B32B3/30 ,  B32B15/01 ,  B32B15/08 ,  B32B15/20 ,  B32B2307/306 ,  B32B2307/714 ,  B32B2457/08 ,  C22C9/00 ,  C25D1/04 ,  C25D3/12 ,  C25D3/38 ,  C25D5/12 ,  C25D9/08 ,  H05K1/0313 ,  H05K3/022 ,  H05K3/025 ,  H05K3/06 ,  H05K3/181 ,  H05K3/188 ,  H05K3/381 ,  H05K3/383 ,  H05K3/388 ,  H05K2201/09009 ,  Y10T428/12549 ,  Y10T428/12569 ,  Y10T428/12611 ,  Y10T428/12792 ,  Y10T428/12847 ,  Y10T428/12903 ,  Y10T428/1291

    Abstract: Provided is a printed wiring board including a copper foil having a roughened layer on at least one surface thereof. In the roughened layer, the average diameter D1 at the particle bottom being apart from the bottom of each particle by 10% of the particle length is 0.2 to 1.0 µm, and the ratio L1/D1 of the particle length L1 to the average diameter D1 at the particle bottom is 15 or less. In the copper foil for printed wiring board, when a copper foil for printed wiring having a roughened layer is laminated to a resin and then the copper layer is removed by etching, the sum of areas of holes accounting for the resin roughened surface having unevenness is 20% or more. The present invention involves the development of a copper foil for a semiconductor package substrate that can avoid circuit erosion without causing deterioration in other properties of the copper foil. In particular, the object of the present invention is to provide a printed wiring board and a method of producing the printed circuit board, in which the adhesion strength between the copper foil and the resin can be enhanced by improvement of the roughened layer of the copper foil.

    Abstract translation: 提供一种印刷线路板，其包括在其至少一个表面上具有粗糙层的铜箔。 在粗糙层中，粒子底部的距离粒子的底部的平均粒径D1的粒子长度的10％为0.2〜1.0μm，粒子长度L1与平均直径D1的比L1 / D1 在颗粒底部为15或更小。 在印刷电路板用铜箔中，当将具有粗糙层的印刷布线用铜箔层压到树脂上，然后通过蚀刻除去铜层时，占据具有不平坦度的树脂粗糙面的孔的面积之和为 20％以上。 本发明涉及开发用于半导体封装基板的铜箔，其可以避免电路侵蚀而不会导致铜箔的其它性能的劣化。 特别地，本发明的目的在于提供一种印刷电路板和印刷电路板的制造方法，其中通过改善铜的粗糙层，可以提高铜箔和树脂之间的粘合强度 挫败。

    SUBSTRATE WITH BUILT-IN COMPONENT, AND MANUFACTURING METHOD FOR SAME
    62.
    发明公开
    SUBSTRATE WITH BUILT-IN COMPONENT, AND MANUFACTURING METHOD FOR SAME 审中-公开
    亚特兰大EINER EINGEBAUTEN KOMPONENTE UND HERSTELLUNGSVERFAHRENDAFÜR

    公开(公告)号：EP2958408A1

    公开(公告)日：2015-12-23

    申请号：EP13874923.9

    申请日：2013-02-12

    Applicant: Meiko Electronics Co., Ltd.

    Inventor： SHIMADA, Hiroshi ,  TODA, Mitsuaki ,  MATSUMOTO, Tohru

    IPC: H05K3/46

    CPC classification number: H05K3/20 ,  C23F1/00 ,  H05K1/0298 ,  H05K1/185 ,  H05K1/188 ,  H05K3/22 ,  H05K3/4611 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/09009 ,  H05K2201/10636 ,  H05K2203/11 ,  Y02P70/611

    Abstract: A device embedded substrate (15) includes an insulating layer (12) including an insulating resin material, an electric or electronic device (4) embedded in the insulating layer (12), a metal film (9) coating at least one face of the device (4), and a roughened portion (10) formed by roughening at least part of the surface of the metal film (9). Preferably, the device embedded substrate (15) further includes: a conductive layer (6) pattern-formed at least on a bottom face (7), the bottom face (7) being one face of the insulating layer (12); and a bonding agent (3) made of a material different from the insulating layer (12) and joining the conductive layer (6) and a mounting face (8), the mounting face (8) being one face of the device (4). The metal film (9) is formed only on a face opposite to the mounting face (8), and the bonding agent (3) has a thickness smaller than a thickness from the metal film (9) to a top face (11), the top face (11) being the other face of the insulating layer (12).

    Abstract translation: 一种器件嵌入式衬底（15）包括绝缘层（12），其包括绝缘树脂材料，嵌入在绝缘层（12）中的电子或电子器件（4），金属膜（9） 以及通过使金属膜（9）的至少一部分表面粗糙化而形成的粗糙部（10）。 优选地，所述器件嵌入式衬底（15）还包括：至少在底面（7）上图案形成的导电层（6），所述底面（7）是所述绝缘层（12）的一个面; 以及由与所述绝缘层（12）不同的材料制成并且将所述导电层（6）和安装面（8）接合的接合剂（3），所述安装面（8）是所述装置（4）的一个面， 。 金属膜（9）仅形成在与安装面（8）相反的面上，粘接剂（3）的厚度比从金属膜（9）到顶面（11）的厚度小， 所述顶面（11）是所述绝缘层（12）的另一面。

    フレキシブルプリント基板、及び、表示装置
    63.
    发明申请
    フレキシブルプリント基板、及び、表示装置 审中-公开
    柔性印刷电路板和显示装置

    公开(公告)号：WO2016158629A1

    公开(公告)日：2016-10-06

    申请号：PCT/JP2016/059281

    申请日：2016-03-24

    Applicant: シャープ株式会社

    Inventor： 渡辺　寿史

    IPC: H05K1/02 ,  G09F9/00 ,  H05K1/14

    CPC classification number: H05K1/147 ,  G02F1/133615 ,  G02F1/13452 ,  G02F2201/56 ,  H05K1/028 ,  H05K1/118 ,  H05K1/148 ,  H05K1/189 ,  H05K2201/055 ,  H05K2201/056 ,  H05K2201/09009 ,  H05K2201/09027 ,  H05K2201/10128 ,  H05K2201/10136

    Abstract: 本発明は、表示パネルにおいて外周の少なくとも一部が湾曲している外縁部に対しても実装可能なフレキシブルプリント基板を提供する。本発明のフレキシブルプリント基板は、複数のスリットが設けられたフレキシブル基材と、複数の配線と、上記複数の配線と各々独立して電気的に接続された複数の端子とを備え、上記複数のスリット及び上記複数の配線は、上記フレキシブル基材の長手方向に沿って設けられ、上記フレキシブル基材の長手方向の一端には、上記複数の端子が設けられているものである。

    Abstract translation: 本发明在显示面板中提供了一种柔性印刷电路板，该柔性印刷电路板甚至可以安装在至少部分外周弯曲的外缘部分上。 根据本发明的柔性印刷电路板设置有：柔性基材，其上设置有多个狭缝; 多根电线; 以及分别电连接到多根电线的多个端子。 沿着柔性基材的长度方向设置多个狭缝和多根电线。 多个端子设置在柔性基材的纵向方向的一端。

    DISPLAY APPARATUS WITH NARROW BEZEL
    64.
    发明申请
    DISPLAY APPARATUS WITH NARROW BEZEL 审中-公开
    显示装置与NARROW BEZEL

    公开(公告)号：WO2016018536A1

    公开(公告)日：2016-02-04

    申请号：PCT/US2015/037477

    申请日：2015-06-24

    Applicant: PIXTRONIX, INC.

    Inventor： PAYNE, Richard Steven

    IPC: H05K1/14

    CPC classification number: H05K1/0306 ,  G02F1/13452 ,  G02F1/13454 ,  H05K1/0298 ,  H05K1/111 ,  H05K1/141 ,  H05K1/144 ,  H05K3/305 ,  H05K3/32 ,  H05K2201/09009 ,  H05K2201/10128 ,  H05K2203/173

    Abstract: This disclosure describes a display having a substrate including a surface and a first plurality of routing lines on the surface. Each of the first plurality of routing lines is separated from an adjacent routing line by at least a first distance. The display also includes a interposer that is bonded to the surface. The interposer includes a first interface that connects the first plurality of conductive routing lines with the interposer. The interposer also includes a plurality of interposer routing lines that are connected to the first interface. Each of the plurality of interposer routing lines is separated from an adjacent interposer routing line by at least a second distance where the second distance is less than the first distance.

    Abstract translation: 本公开描述了一种显示器，其具有包括表面的基板和表面上的第一多个布线线。 第一组多个路由线路中的每一条路线与相邻的路由线路分开至少第一距离。 显示器还包括结合到表面的插入器。 插入器包括将第一多个导电布线线与插入件连接的第一接口。 插入器还包括连接到第一接口的多个插入器路由线。 多个插入器路由线中的每一个与相邻插入器路由线分开至少第二距离，其中第二距离小于第一距离。

    전자기파의 직접 조사에 의한 도전성 패턴 형성 방법과, 도전성 패턴을 갖는 수지 구조체
    65.
    发明申请
    전자기파의 직접 조사에 의한 도전성 패턴 형성 방법과, 도전성 패턴을 갖는 수지 구조체 审中-公开
    通过直接辐射电磁波形成导电图案的方法和具有导电图案的树脂结构

    公开(公告)号：WO2015020332A1

    公开(公告)日：2015-02-12

    申请号：PCT/KR2014/006756

    申请日：2014-07-24

    Applicant: 주식회사 엘지화학

    Inventor： 김재현 ,  김재진 ,  박철희 ,  박치성 ,  전신희 ,  정상윤 ,  정한나

    IPC: H01B13/00 ,  H01B5/14 ,  C08J7/06

    CPC classification number: C23C18/31 ,  C09D5/24 ,  C23C18/1608 ,  C23C18/1612 ,  C23C18/1641 ,  C23C18/1689 ,  C23C18/204 ,  C23C18/2053 ,  C23C18/22 ,  C23C18/30 ,  C23C18/32 ,  C23C18/38 ,  C25D5/02 ,  C25D5/56 ,  H05K1/0296 ,  H05K1/09 ,  H05K3/02 ,  H05K3/181 ,  H05K2201/09009

    Abstract: 본 발명은 특수한 무기 첨가제를 고분자 수지 자체에 포함시키지 않고도, 각종 고분자 수지 제품 또는 수지층 상에 단순화된 공정으로 미세한 도전성 패턴을 형성할 수 있게 하는 전자기파의 직접 조사에 의한 도전성 패턴의 형성 방법과, 이로부터 형성된 도전성 패턴을 갖는 수지 구조체에 관한 것이다. 상기 전자기파의 직접 조사에 의한 도전성 패턴의 형성 방법은 고분자 수지 기재에 선택적으로 전자기파를 조사하여 소정의 표면 거칠기를 갖는 제 1 영역을 형성하는 단계; 고분자 수지 기재 상에 전도성 시드(conductive seed)를 형성하는 단계; 전도성 시드가 형성된 고분자 수지 기재를 도금하여 금속층을 형성하는 단계; 및 제 1 영역보다 작은 표면 거칠기를 갖는 고분자 수지 기재의 제 2 영역에서 상기 전도성 시드 및 금속층을 제거하는 단계를 포함하는 것이다.

    Abstract translation: 本发明涉及通过直接照射电磁波形成导电图案的方法，其允许通过简化的方法在各种聚合物树脂产品或树脂层上形成精细的导电图案，而不在聚合物树脂中引入特殊的无机添加剂 ; 以及具有通过其形成的导电图案的树脂结构。 通过直接照射电磁波形成导电图案的方法包括以下步骤：通过用电磁波选择性地照射聚合物树脂基材，形成具有预定表面粗糙度的第一区域; 在聚合物树脂基材上形成导电种子; 通过电镀其上形成有导电种子的聚合物树脂基材形成金属层; 以及从具有比第一区域更小的表面粗糙度的聚合物树脂基材的第二区域去除导电种子和金属层。

    RAPID PCB PROTOTYPING BY SELECTIVE ADHESION
    67.
    发明申请
    RAPID PCB PROTOTYPING BY SELECTIVE ADHESION 审中-公开
    通过选择性粘合快速PCB原型制作

    公开(公告)号：WO2017096028A1

    公开(公告)日：2017-06-08

    申请号：PCT/US2016/064398

    申请日：2016-12-01

    Applicant: HONEYWELL FEDERAL MANUFACTURING & TECHNOLOGIES, LLC

    Inventor： HATCH, Jonathan Douglas ,  HATCH, Stephen McGarry

    IPC: H05K1/03 ,  H05K1/02 ,  H05K3/10 ,  H05K3/38

    CPC classification number: H05K1/0306 ,  H05K1/02 ,  H05K1/028 ,  H05K1/0393 ,  H05K1/115 ,  H05K1/144 ,  H05K3/0023 ,  H05K3/0064 ,  H05K3/007 ,  H05K3/048 ,  H05K3/103 ,  H05K3/125 ,  H05K3/386 ,  H05K3/389 ,  H05K3/4611 ,  H05K3/4644 ,  H05K2201/0145 ,  H05K2201/0154 ,  H05K2201/05 ,  H05K2201/09009 ,  H05K2203/0152

    Abstract: A PCB page blank includes a flexible substrate, a curable adhesive, a conductive layer, and a conductive layer support. The flexible substrate receives an opaque negative circuit pattern thereon. Portions of the curable adhesive not obscured by the circuit pattern may bond to portions of the conductive layer when exposed to light. The bonded portions of the conductive layer shear or tear from non-bonded portions of the conductive layer such that the bonded portions remain with the flexible substrate and the non-bonded portions remain with the conductive layer support when the flexible substrate and the conductive layer support are separated. The flexible substrate and the bonded portions of the conductive layer thus form a PCB prototype with the bonded portions of the conductive layer forming circuit traces of the circuit pattern.

    Abstract translation: PCB页坯包括柔性衬底，可固化粘合剂，导电层和导电层支撑件。 柔性基板在其上接收不透明的负电路图案。 当暴露于光时，未被电路图案遮蔽的可固化粘合剂的部分可以粘合到导电层的部分。 导电层的接合部分从导电层的非接合部分剪切或撕裂，使得接合部分与柔性衬底保持在一起，并且当柔性衬底和导电层支撑件 是分开的。 因此，柔性衬底和导电层的接合部分形成PCB原型，其中导电层的接合部分形成电路图案的电路迹线。

    TAPE CARRIER PACKAGE AND METHOD OF MANUFACTURING THE SAME
    70.
    发明申请
    TAPE CARRIER PACKAGE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    TAPE CARRIER包装及其制造方法

    公开(公告)号：WO2013069947A1

    公开(公告)日：2013-05-16

    申请号：PCT/KR2012/009284

    申请日：2012-11-06

    Applicant: LG INNOTEK CO., LTD.

    Inventor： KIM, Hong Il

    IPC: H01L23/48 ,  G02F1/1345 ,  H05K3/28

    CPC classification number: H05K1/115 ,  H01L21/486 ,  H01L23/4985 ,  H01L2924/0002 ,  H05K1/0393 ,  H05K1/181 ,  H05K3/0038 ,  H05K2201/09009 ,  H01L2924/00

    Abstract: Provided are a tape carrier package and a method of manufacturing the same, the method, including: forming through holes by performing a drill process using a laser to an insulating film of a flexible copper clad laminate (FCCL) film consisting of the insulating film and a copper layer; forming a circuit pattern layer by performing an etching process to the copper layer of the FCCL film; and selectively forming a plating layer on the circuit pattern layer. The method of manufacturing the tape carrier package according to the present invention is advantageous because a punching process, and processes for laminating and drying the copper layer which are necessary for the conventional method of manufacturing the tape carrier package can be omitted, a production cost of the tape carrier package is reduced, and the time required for the drying process is saved.

    Abstract translation: 提供一种载带封装及其制造方法，该方法包括：通过对由绝缘膜和由绝缘膜构成的柔性覆铜层压板（FCCL）膜的绝缘膜进行激光的钻孔处理来形成通孔， 铜层; 通过对FCCL膜的铜层进行蚀刻工艺形成电路图案层; 并且在电路图案层上选择性地形成镀层。 根据本发明的带状载体包装的制造方法是有利的，因为可以省略传统的制造带状载体包装方法所需的冲压工艺和层压和干燥铜层的方法，生产成本 减少了载带包装，节省了干燥过程所需的时间。

Patent Agency Ranking